The ADC32RF8x (ADC32RF80 and ADC32RF83) is a 14-bit, 3-GSPS, dual-channel telecom receiver and feedback device family that supports RF sampling with input frequencies up to 4 GHz and beyond. Designed for high signal-to-noise ratio (SNR), the ADC32RF8x family delivers a noise spectral density of –155 dBFS/Hz as well as dynamic range and channel isolation over a large input frequency range. The buffered analog input with on-chip termination provides uniform input impedance across a wide frequency range and minimizes sample-and-hold glitch energy.
Each channel can be connected to a dual-band, digital down-converter (DDC) with up to three independent, 16-bit numerically-controlled oscillators (NCOs) per DDC for phase-coherent frequency hopping. Additionally, the ADC is equipped with front-end peak and RMS power detectors and alarm functions to support external automatic gain control (AGC) algorithms.
The ADC32RF8x supports the JESD204B serial interface with subclass 1-based deterministic latency using data rates up to 12.5 Gbps with up to four lanes per ADC. The device is offered in a 72-pin VQFN package (10 mm × 10 mm) and supports the industrial temperature range (–40°C to +85°C).
| Type | Title | Date | ||
|---|---|---|---|---|
| * | Data sheet | ADC32RF8x Dual-Channel, 3-GSPS Telecom Receiver and Feedback Devices datasheet (Rev. B) | PDF | HTML | 21 Dec 2021 |
| EVM User's guide | ADC32RFxxEVM User's Guide (Rev. E) | 31 Jan 2020 | ||
| Application note | Spurs Analysis in the RF Sampling ADC | 09 Feb 2018 | ||
| Application note | Configuration Files for ADC32RF45, ADC32RF83, and ADC32RF80 (Rev. B) | 05 Sep 2017 | ||
| Design guide | Wideband Receiver With 66AK2L06 JESD204B Attach to ADC32RF80 Reference Design | 23 Sep 2016 | ||
| Application note | RF Sampling ADC with 800MHz of IBW LTE | 08 Sep 2016 | ||
| White paper | Analog advancements make waves in 5G communications | 12 Aug 2016 |
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The ADC32RF80 evaluation module (EVM) demonstrates the performance of a dual 3-GSPS 14-bit analog-to-digital converter (ADC) with the JESD204B interface. The EVM includes the ADC32RF80 device, and JESD204B clocking is provided by the LMK04828 and TI voltage regulators to provide the necessary (...)
This high-speed data converter pro GUI is a PC (Windows® XP/7/10 compatible) program designed to aid in evaluation of most TI high-speed data converter [analog-to-digital converter (ADC) and digital-to-analog converter (DAC)] and analog front-end (AFE) platforms. Designed to support the entire (...)
This Excel calculator provides system designers a way to simplify the design and debugging of direct RF-sampling receivers. It offers three functions: frequency planning, analog filtering, and decimation filter spur location.
In the concept phase, a frequency-planning tool enables fine tuning of (...)
| Package | Pins | CAD symbols, footprints & 3D models |
|---|---|---|
| VQFN (RRH) | 72 | Ultra Librarian |
| VQFNP (RMP) | 72 | Ultra Librarian |
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