RF PLLs & synthesizers
Achieve ultra-low phase noise for high-performance test instrumentation, satellites, radar and 5G wireless systems
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Low phase noise
Achieve the best phase-noise performance using our synthesizers with integrated voltage-controlled oscillators (VCOs) and PLLs
High-speed data converter clocking
Clock high-speed ADCs and DACs with SYSREF and JESD204B enabled devices
Space and high reliability
Operate in space and harsh environments with radiation-hardened and extended-temperature devices
Low-power
Reduce current consumption for power sensitive and battery-operated applications
RF clock distribution
Distribute and fan-out your RF clocks with ultra-low additive jitter and exceptionally low noise floor
Design & development resources
Texas Instruments PLLatinum Simulator Tool
PLLATINUMSIM-SW is a simulation tool that allows users to create detailed designs and simulations of our PLLatinum™ integrated circuits, which include the LMX series of phase-locked loops (PLLs) and synthesizers.
Texas Instruments Clocks and Synthesizers (TICS) Pro Software
Texas Instruments clocks and synthesizers (TICS) pro software is used to program the evaluation modules (EVMs) for product numbers with these prefixes: CDC, LMK and LMX. These products include phase-locked loops and voltage-controlled oscillators (PLL+VCO), synthesizers and clocking devices.
Clock tree architect programming software
Clock tree architect is a clock tree synthesis tool that streamlines your design process by generating clock tree solutions based on your system requirements. The tool pulls data from an extensive database of clocking products to generate a system-level multi-chip clocking solution.