TIDA-01050

Optimized Analog Front End DAQ System Reference Design for 18 bit SAR Data Converters

TIDA-01050

Design files

Overview

The TIDA-01050 reference design aims to improve the integration, power consumption, performance, and clocking issues typically associated with automatic test equipment. This design is applicable to any ATE system but most applicable to systems requiring a large number of input channels.

Features
  • Negative rail input (NRI), rail-to-rail output (RRO)
  • Wide output common-mode control range
  • Low power consumption
  • High THD, SNR and ENOB
  • Dual supply on AFE maximizing system performance
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A fully assembled board has been developed for testing and performance validation only, and is not available for sale.

Design files & products

Design files

Download ready-to-use system files to speed your design process.

TIDUCF5A.PDF (5891 K)

Reference design overview and verified performance test data

TIDRP95.PDF (2572 K)

Detailed schematic diagram for design layout and components

TIDRP96.PDF (247 K)

Complete listing of design components, reference designators, and manufacturers/part numbers

TIDRP97.PDF (3862 K)

Detailed overview of design layout for component placement

TIDRP99.ZIP (2442 K)

Files used for 3D models or 2D drawings of IC components

TIDCD14.ZIP (1180 K)

Design file that contains information on physical board layer of design PCB

TIDRP98.PDF (7143 K)

PCB layer plot file used for generating PCB design layout

Products

Includes TI products in the design and potential alternatives.

AC/DC & DC/DC converters (integrated FET)

LM557475V, 0.5A Step-Down Switching Regulator

Data sheet: PDF
AC/DC & DC/DC converters (integrated FET)

LM7705Low Noise Negative Bias Generator

Data sheet: PDF | HTML
Clock buffers

LMK00804BLow skew, 1-to-4 multiplexed differential/LVCMOS-to-LVCMOS/TTL fanout buffer

Data sheet: PDF | HTML
D-type flip-flops

SN74AUP1G80Low-Power Single Postitive-Edge-Triggered D-Type Flip-Flop

Data sheet: PDF | HTML
Fully differential amplifiers

THS4551Low Noise, Precision, 150MHz, Fully Differential Amplifier

Data sheet: PDF | HTML
High-speed op amps (GBW ≥ 50 MHz)

OPA625High Bandwidth, High Precision, Low Noise & Distortion Amplifier SAR ADC Driver with Power Scaling

Data sheet: PDF | HTML
Inverting buffers & drivers

SN74AHC1G04Single 2-V to 5.5-V inverter

Data sheet: PDF | HTML
Linear & low-dropout (LDO) regulators

TPS7A3001-EPEnhanced product, negative VIN, 200-mA, ultra-low noise, high PSRR, LDO regular

Data sheet: PDF
Linear & low-dropout (LDO) regulators

TPS7A471-A, 36-V, low-noise, high-PSRR, low-dropout voltage regulator with enable

Data sheet: PDF | HTML
Oscillators

LMK61E2156.250-MHz, ±50 ppm, ultra-low jitter, integrated EEPROM, fully programmable oscillator

Data sheet: PDF | HTML
Power modules (integrated inductor)

LMZ14201SIMPLE SWITCHER® 6V to 42V, 1A Power Module in Leaded Surface Mount TO Package

Data sheet: PDF | HTML
Power modules (integrated inductor)

LMZ14202SIMPLE SWITCHER® 6V to 42V, 2A Power Module in Leaded SMT-TO Package

Data sheet: PDF | HTML
Power modules (integrated inductor)

LMZ14203SIMPLE SWITCHER® 6V to 42V, 3A Power Module in Leaded Surface Mount TO Package

Data sheet: PDF | HTML
Precision ADCs

ADS8910B18-Bit, 1-MSPS, 1-Ch SAR ADC with Internal VREF Buffer, Internal LDO and Enhanced SPI Interface

Data sheet: PDF | HTML
Precision op amps (Vos<1mV)

OPA376Precision (0.025mV), low noise (7.5nV/rtHz), low quiescent current (760uA) op amp

Data sheet: PDF | HTML
Precision op amps (Vos<1mV)

OPA827Low-noise, high-precision, JFET-input operational amplifier

Data sheet: PDF | HTML
Series voltage references

REF60414.096-V, 5-ppm/°C high-precision voltage reference with integrated buffer & enable pin

Data sheet: PDF | HTML

Technical documentation

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Type Title Date
* Design guide Optimized Analog Front-End DAQ System Ref Design for 18-Bit SAR Data Converters (Rev. A) Mar. 17, 2016

Related design resources

Reference designs

REFERENCE DESIGN
TIDA-00732 18-bit, 2-Msps Isolated Data Acquisition Reference Design to Achieve Maximum SNR and Sampling Rate TIDA-01035 20-bit Isolated Data Acquisition Reference Design Optimizing Jitter for Max SNR and Sample Rate TIDA-01037 20-bit, 1-MSPS Isolator Optimized Data Acquisition Reference Design Maximizing SNR and Sample Rate TIDA-01051 Reference Design Optimizing FPGA Utilization and Data Throughput for Automatic Test Equipment TIDA-01052 ADC Driver Reference Design Improving Full Scale THD Using Negative Supply TIDA-01053 ADC Driver Reference Design Optimizing THD, Noise, and SNR for High Dynamic Range Instrumentation TIDA-01054 Multi-Rail Power Reference Design for Eliminating EMI Effects in High Performance DAQ Systems TIDA-01055 ADC Voltage Reference Buffer Optimization Reference Design for High Performance DAQ Systems TIDA-01056 20-bit 1MSPS DAQ Reference Design Optimizing Power Supply Efficiency While Minimizing EMI TIDA-01057 Reference Design Maximizing Signal Dynamic Range for True 10 Vpp Differential Input to 20 bit ADC TIPD211 20-bit, 1-MSPS, 4-Ch Small Form Factor Design for Test and Measurement Applications Reference Design

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