TIDA-00353

Equalization Optimization of a JESD204B Serial Link Reference Design

TIDA-00353

Design files

Overview

Employing equalization techniques is an effective way of compensating for channel loss in JESD204B high speed serial interfaces for data converters. This reference design features the ADC16DX370, a dual 16-bit, 370 MSPS analog-to-digital converter (ADC) that utilizes de-emphasis equalization to prepare the 7.4 Gbps serial data for transmission. Configuration allows a user to optimize the de-emphasis setting (DEM) and output voltage swing setting (VOD) of the output driver to inversely match the characteristics of the channel. Experiments demonstrate the reception of a clean data eye over 20” of FR-4 material at the full data rate.

Features

Achieve a high performance JESD204B serial link using low cost PCB materials
Understand the limitations of lossy channels and equalization techniques to overcome the limitations
Use a formula-based approach to optimizing the equalization features of the ADC16DX370
This reference design is tested and includes an EVM, configuration software and User's Guide

Communications equipment

Small cell base station

Industrial

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Design files & products

Design files

Download ready-to-use system files to speed your design process.

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Design guide — TIDA-00353

TIDU551.PDF (1256 K)

Reference design overview and verified performance test data

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Schematic — TIDA-00353

TIDRBP1.PDF (309 K)

Detailed schematic diagram for design layout and components

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Bill of materials (BOM) — TIDA-00353

TIDRBP2.PDF (82 K)

Complete listing of design components, reference designators, and manufacturers/part numbers

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Assembly drawing — TIDA-00353

TIDRBP3.ZIP (2524 K)

Detailed overview of design layout for component placement

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Assembly drawing — TIDA-00353

TIDRBP4.ZIP (2545 K)

Detailed overview of design layout for component placement

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CAD/CAE symbol — TIDA-00353

TIDRBP7.ZIP (1430 K)

Files used for 3D models or 2D drawings of IC components

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CAD/CAE symbol — TIDA-00353

TIDRBP8.ZIP (182 K)

Files used for 3D models or 2D drawings of IC components

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Gerber file — TIDA-00353

TIDC748.ZIP (706 K)

Design file that contains information on physical board layer of design PCB

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PCB layout — TIDA-00353

TIDRBP5.PDF (1014 K)

PCB layer plot file used for generating PCB design layout

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PCB layout — TIDA-00353

TIDRBP6.ZIP (1259 K)

PCB layer plot file used for generating PCB design layout

Products

Includes TI products in the design and potential alternatives.

High-speed ADCs (≥10 MSPS)

ADC16DX370 — Dual-Channel, 16-Bit, 370-MSPS Analog-to-Digital Converter (ADC)

Data sheet: PDF | HTML

Clock jitter cleaners

LMK04828 — Ultra low-noise JESD204B compliant clock jitter cleaner with integrated 2370 to 2630-MHz VCO0.

Data sheet: PDF | HTML

Direction-controlled voltage translators

SN74AVC4T774 — Four-bit dual-supply bus transceiver with configurable voltage-level shifting and tri-state outputs

Data sheet: PDF | HTML

Linear & low-dropout (LDO) regulators

LP3878-ADJ — 800-mA, 16-V, adjustable low-dropout voltage regulator with enable

Data sheet: PDF | HTML

RF VGAs

LMH6521 — High Performance Dual DVGA

Data sheet: PDF | HTML

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Hardware

Evaluation board

ADC16DX370EVM — ADC16DX370 Evaluation Module

The ADC16DX370EVM is an evaluation module used for evaluation of the ADC16DX370. The ADC16DX370 is a low power, 16-bit, 370-MSPS analog to digital converter (ADC) with a buffered analog input, and outputs featuring a JESD204B interface operating at up to 7.4Gb/s. The EVM has (...)

User guide: PDF