Operating characteristics
Extended temperature range: -40°C to 125°C
Wide supply voltage range: 1.65V to 5.5V
Configurable macro-cells
2-, 3-, and 4-bit lookup tables
D-type flip-flops and latches with and without reset/set option
8-bit pipe delay
Counters and delay generator
Programmable deglitch filter or edge detector
Oscillator
Flexible digital I/O features
All digital signals can be routed to any GPIO
Digital input modes: digital in with and without Schmitt-trigger, low-voltage digital in
Digital output modes: push-pull, open-drain NMOS, tri-state
Development tools
InterConnect Studio
TPLD801 evaluation module
TPLD programming board
The TPLD801 is part of the TI programmable logic device (TPLD) family of devices that feature versatile programmable logic ICs with combinational logic, sequential logic, and analog blocks. TPLD provides a fully integrated, low power solution to implement common system functions, such as timing delays, voltage monitors, system resets, power sequencers, I/O expanders, and more. This device features configurable I/O structures that extends compatibility within mixed-signal environments, reducing the number of discrete components required.
System designers can create circuits and configure the macro-cells, I/O pins, and interconnections by temporarily emulating the non-volatile memory or by permanently programming the one-time programmable (OTP) through InterConnect Studio. The TPLD801 is supported by hardware and software ecosystem with application notes, reference designs and design examples. Visit ti.com for more information and access to design tools.
| Type | Title | Date | ||
|---|---|---|---|---|
| * | Data sheet | TPLD801 Programmable Logic Device with 6-GPIO datasheet | PDF | HTML | 04 Sep 2024 |
For additional terms or required resources, click any title below to view the detail page where available.
| Package | Pins | CAD symbols, footprints & 3D models |
|---|---|---|
| SOT-5X3 (DRL) | 8 | Ultra Librarian |
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