This three-phase, compact power stage reference design for industrial drives, which uses a UCC53xx gate driver to support basic capacitive isolation requirements, provides an increased lifespan and better propagation delay match over optocouplers to minimize inverter deadband distortions and losses. If required, another level of basic isolation can be used between the controllers to achieve reinforced isolation at the system level. This approach optimizes the isolation cost of the system and adds an added benefit of compactness. This design also demonstrates the interlocking feature of the gate driver, which protects the IGBTs during shoot-through. This reference design uses the F28379 Delfino control card to generate PWM signals for controlling the three-phase inverter.
Features
- Basic isolated 200- to 480-V AC three-phase power statge with direct PWM CMOS interface to MCU for hot-side control
- Low pin count gate driver UCC53xx enables compact solution and increased flexibility of gate driver placement
- Short (72ns typical) propagation delay and very small skew between propagation delays optimizes deadband distortion and losses
- Gate driver supports option for PWM interlock protection to avoid shoot-through
- Option to populate three variants of gate drivers:
- Miller clamp to avoid parasitic turnon effect
- UVLO with reference to emitter to provide robust protection of IGBT against operation of linear region
- Split output to control rise and fall times