TIDA-00720

Power Cycling Reference Design to Extend Battery Life Using an Ultra-Low IQ LDO and Nano Timer

TIDA-00720

Design files

Overview

The TIDA-00720 reference design shows a method to extend battery life by power cycling. The power cycling concept consist in time interval period that enables the power management devices for just enough time for the microcontroller to execute the program, transmit data or collect data. Some of the MCUs have sleep modes with low stand-by currents, but the power management devices will continue to dissipate power if they are left enabled. The current leakage is higher during the enabled mode and will add up to the total power waste during the MCU sleep cycles.

This design is ideal for systems that operate for various years without replacing the battery; these systems do not need to run constantly instead they operate in periodic intervals of seconds, minutes or even an hour in between operating time.

Features
  • Prolonged battery life by using power cycling. Sleep mode has an ultra-low quiescent (typically 44nA).
  • Time intervals can be adjusted from 10ms to 2h with an external resistor.
  • Ultra-low noise and ripple free 1.8V output voltage
  • Fast power-up voltage supply. Power supply is disabled as soon as the MCU sends a process completion signal.
  • Cost efficient solution with only a few compensation components
  • TIDA-00720 provides a design guide and design files of the power management solution.
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A fully assembled board has been developed for testing and performance validation only, and is not available for sale.

Design files & products

Design files

Download ready-to-use system files to speed your design process.

TIDUAP0.PDF (920 K)

Reference design overview and verified performance test data

TIDRIC9.PDF (190 K)

Detailed schematic diagram for design layout and components

TIDRID0.PDF (207 K)

Complete listing of design components, reference designators, and manufacturers/part numbers

TIDCB99.ZIP (1224 K)

Design file that contains information on physical board layer of design PCB

TIDRID1.PDF (476 K)

PCB layer plot file used for generating PCB design layout

Products

Includes TI products in the design and potential alternatives.

Linear & low-dropout (LDO) regulators

LP38693500-mA, 10-V, low-dropout voltage regulator with enable

Data sheet: PDF | HTML
Real-time clocks (RTCs) & timers

TPL5111Ultra low power system timer (35 nA) for power gating in duty cycled applications

Data sheet: PDF | HTML

Technical documentation

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Type Title Date
* Design guide Power Cycling to Extend Battery Life Using an Ultra-Low IQ LDO Design Guide Sep. 22, 2015
Technical article How LDOs contribute to power efficiency PDF | HTML May 13, 2016

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