This reference design shows a universal power supply solution for DDR3 and DDR4 memory. A synchronous Buck converter provides an output voltage of 1.35V for a 9A load in DDR3L configuration. A linear regulator provides a second voltage of 0.675V for a 2A load.
| Output voltage options | PMP10029.1 | PMP10029.2 |
|---|---|---|
| Vin (Min) (V) | 1.35 | 4.5 |
| Vin (Max) (V) | 1.35 | 5.5 |
| Vout (Nom) (V) | 1.35 | 1.35 |
| Iout (Max) (A) | 2 | 9 |
| Output Power (W) | 2.7 | 12.15 |
| Isolated/Non-Isolated | Non-Isolated | Non-Isolated |
| Input Type | DC | DC |
| Topology | Linear Regulator | Buck- Synchronous |
A fully assembled board has been developed for testing and performance validation only, and is not available for sale.
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Test results for the reference design, including efficiency graphs, test prerequisites and more
Detailed schematic diagram for design layout and components
Complete listing of design components, reference designators, and manufacturers/part numbers
PCB layer plot file used for generating PCB design layout
Includes TI products in the design and potential alternatives.
| Type | Title | Date | ||
|---|---|---|---|---|
| Test report | PMP10029 Test Results | Apr. 14, 2015 |
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