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UCC21220
3.0kVrms, 4A/6A dual-channel isolated gate driver with disable pin & 8V UVLO for MOSFETs & GaNFETs
Data sheet
UCC21220
- Universal: dual low-side, dual high-side or half-bridge driver
- Supports basic and functional isolation
- CMTI greater than 125V/ns
- Up to 4A peak source, 6A peak sink output
- Switching parameters:
- 33ns typical propagation delay
- 5ns maximum pulse-width distortion
- 10µs maximum VDD power-up delay
- Up to 25V VDD output drive supply
- 5V and 8V VDD UVLO Options
- Junction temperature range (Tj) –40°C to 150°C
- Narrow body SOIC-16 (D) package
- TTL and CMOS compatible inputs
- Safety-related certifications:
- 4242VPK isolation per DIN EN IEC 60747-17 (VDE 0884-17) (planned)
- 3000VRMS isolation for 1 minute per UL 1577 (planned)
- CQC certification per GB4943.1-2022 (planned)
The UCC21220 and UCC21220A devices are basic and functional isolated dual-channel gate drivers with 4A peak-source and 6A peak-sink current. They are designed to drive power MOSFETs and GaNFETs in PFC, Isolated DC/DC, and synchronous rectification applications, with fast switching performance and robust ground bounce protection through greater than 125V/ns common-mode transient immunity (CMTI).
These devices can be configured as two low-side drivers, two high-side drivers, or half-bridge drivers. Two outputs can be paralleled to form a single driver which doubles the drive strength for heavy load conditions due to the best-in-class delay matching performance.
Protection features include the following: DIS pin shuts down both outputs simultaneously when it is set high, all supplies have undervoltage lockout (UVLO), and active pulldown protection clamps the output below 2V when unpowered or floated.
With these features, these devices enable high efficiency, high power density, and robustness in a wide variety of power applications.
Technical documentation
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Evaluation board
UCC21220EVM-009 — UCC21220 4-A, 6-A 3.0-kVRMS Isolated Dual-Channel Gate Driver Evaluation Module
UCC21220EVM-009 is designed for evaluating UCC21220, which is a 3.0-kVRMS Isolated Dual-Channel Gate Driver with 4.0-A source and 6.0-A sink peak current capability. This EVM could be served to evaluate the driver IC against its datsheet. The EVM can also be used as Driver IC component selection (...)
User guide: PDF
Simulation tool
PSPICE-FOR-TI — PSpice® for TI design and simulation tool
PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Reference designs
PMP23338 — 3.6kW single-phase totem-pole bridgeless PFC reference design with e-meter functionality
This reference design is a Gallium nitride (GaN) based, 3.6kW, single-phase continuous conduction mode (CCM) totem-pole bridgeless power factor correction (PFC) converter, targeting M-CRPS power supply. This design includes e-meter functionality with 0.5% accuracy, eliminating the need for (...)
Test report: PDF
Reference designs
PMP23069 — 3-kW, 180-W/in3 single-phase totem-pole bridgeless PFC reference design with 16-A max input
This reference design demonstrates a method to control a continuous conduction mode Totem pole power factor correction converter (PFC) using C2000 F28003x and F28004x microcontrollers. The PFC also works as inverter in grid connected (current controlled) mode. The converter is designed to support a (...)
Test report: PDF
Reference designs
PMP22220 — 1500-W AC switch bridgeless PFC reference design
This reference design is an AC switch bridgeless power factor correction (PFC) that operates with continuous conduction mode (CCM). It takes universal AC-input voltage (90 VAC to 264 VAC), provides 390-V, 1000-W low-line output and 1500-W high-line output. This design uses the UCD3138 digital (...)
Reference designs
PMP40500 — 54-VDC input, 12-V 42-A output half-bridge reference design
This 12-V, 42-A output half-bridge reference design is for bus converters in wired networking campus and branch switches. The design features high efficiency and various fault protections (over-current and short-circuit). The design provides an efficiency comparison using 3 kVRMS basic and (...)
| Package | Pins | CAD symbols, footprints & 3D models |
|---|---|---|
| SOIC (D) | 16 | Ultra Librarian |
Ordering & quality
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