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SN74LV4051A

ACTIVE

5V 8:1 one-channel general-purpose analog multiplexer

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Data sheet

SN74LV4051A

ACTIVE
Data sheet Order now

Product details

Configuration 8:1 Number of channels 1 Power supply voltage - single (V) 1.8, 2.5, 3.3, 5 Protocols Analog Ron (typ) (Ω) 22 CON (typ) (pF) 23.4 ON-state leakage current (max) (µA) 1 Bandwidth (MHz) 35 Operating temperature range (°C) -40 to 85 Input/output continuous current (max) (mA) 25 Rating Catalog Drain supply voltage (max) (V) 5.5 Supply voltage (max) (V) 5.5
Configuration 8:1 Number of channels 1 Power supply voltage - single (V) 1.8, 2.5, 3.3, 5 Protocols Analog Ron (typ) (Ω) 22 CON (typ) (pF) 23.4 ON-state leakage current (max) (µA) 1 Bandwidth (MHz) 35 Operating temperature range (°C) -40 to 85 Input/output continuous current (max) (mA) 25 Rating Catalog Drain supply voltage (max) (V) 5.5 Supply voltage (max) (V) 5.5
PDIP (N) 16 181.42 mm² 19.3 x 9.4 SOIC (D) 16 59.4 mm² 9.9 x 6 SOP (NS) 16 79.56 mm² 10.2 x 7.8 SOT-23-THN (DYY) 16 8.4 mm² 4.2 x 2 SSOP (DB) 16 48.36 mm² 6.2 x 7.8 TSSOP (PW) 16 32 mm² 5 x 6.4 TVSOP (DGV) 16 23.04 mm² 3.6 x 6.4 VQFN (RGY) 16 14 mm² 4 x 3.5
  • 1.65V to 5.5V VCC operation
  • Support mixed-mode voltage operation on all ports
  • High on-off output-voltage ratio
  • Low crosstalk between switches
  • Individual switch controls
  • Extremely low input current
  • Latch-up performance exceeds 100mA per JESD 78, class II
  • ESD protection exceeds JESD 22
    • 2000V human-body model (A114-A)
    • 200V machine model (A115-A)
    • 1000V charged-device model (C101)
  • 1.65V to 5.5V VCC operation
  • Support mixed-mode voltage operation on all ports
  • High on-off output-voltage ratio
  • Low crosstalk between switches
  • Individual switch controls
  • Extremely low input current
  • Latch-up performance exceeds 100mA per JESD 78, class II
  • ESD protection exceeds JESD 22
    • 2000V human-body model (A114-A)
    • 200V machine model (A115-A)
    • 1000V charged-device model (C101)

The SN74LV4051A 8-channel CMOS analog multiplexers and demultiplexers are designed for 1.65V to 5.5V VCC operation.

The SN74LV4051A devices handle both analog and digital signals. Each channel permits signals with amplitudes up to 5.5V (peak) to be transmitted in either direction.

Applications include: signal gating, chopping, modulation or demodulation (modem), and signal multiplexing for analog-to-digital and digital-to-analog conversion systems.

The SN74LV4051A 8-channel CMOS analog multiplexers and demultiplexers are designed for 1.65V to 5.5V VCC operation.

The SN74LV4051A devices handle both analog and digital signals. Each channel permits signals with amplitudes up to 5.5V (peak) to be transmitted in either direction.

Applications include: signal gating, chopping, modulation or demodulation (modem), and signal multiplexing for analog-to-digital and digital-to-analog conversion systems.
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Technical documentation

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Type Title Date
* Data sheet SN74LV4051A 8-Channel Analog Multiplexers and Demultiplexers datasheet (Rev. K) PDF | HTML 11 Sep 2024
Application note Selecting the Correct Texas Instruments Signal Switch (Rev. E) PDF | HTML 02 Jun 2022
Application note Multiplexers and Signal Switches Glossary (Rev. B) PDF | HTML 01 Dec 2021

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Interface adapter

LEADED-ADAPTER1 — Surface mount to DIP header adapter for quick testing of TI's 5, 8, 10, 16 & 24-pin leaded packages

The EVM-LEADED1 board allows for quick testing and bread boarding of TI's common leaded packages.  The board has footprints to convert TI's D, DBQ, DCT,DCU, DDF, DGS, DGV, and PW surface mount packages to 100mil DIP headers.     

User guide: PDF
Not available on TI.com
Interface adapter

LEADLESS-ADAPTER1 — Surface mount to DIP header adapter for testing of TI's 6,8,10,12,14,16, & 20-pin leadless packages

The EVM-LEADLESS1 board allows for quick testing and bread boarding of TI's common leadless packages.  The board has footprints to convert TI's DRC, DTP, DQE, RBW, RGY, RSE, RSV, RSW RTE, RTJ, RUK , RUC, RUG, RUM,RUT and YZP surface mount packages to 100mil DIP headers.
User guide: PDF
Not available on TI.com
Simulation model

SN74LV4051A PSpice Transient Model

SCLM117.ZIP (35 KB) - PSpice Model
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Package Pins CAD symbols, footprints & 3D models
PDIP (N) 16 Ultra Librarian
SOIC (D) 16 Ultra Librarian
SOP (NS) 16 Ultra Librarian
SOT-23-THN (DYY) 16 Ultra Librarian
SSOP (DB) 16 Ultra Librarian
TSSOP (PW) 16 Ultra Librarian
TVSOP (DGV) 16 Ultra Librarian
VQFN (RGY) 16 Ultra Librarian
TI's Standard Terms and Conditions for Evaluation Items apply.

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