The LSF0002 supports bidirectional voltage translation without the need for DIR pin, which minimizes system effort (for PMBus, I2C, SMBus, and so forth). The LSF family of devices supports up to 100MHz up translation and greater than 100MHz down translation at ≤ 30pF capacitive load and up to 40MHz up or down translation at 50pF capacitive load, which allows the LSF family to support more consumer or telecom interfaces (MDIO or SDIO).
LSF family supports 5V tolerance on I/O port, which makes it compatible with TTL levels in industrial and telecom applications. The LSF family can set up different voltage translation levels, which makes it very flexible.
Unlike the LSF0x0x family, the LSF0002 does not require VREF_A and VREF_B power supplies and the 200kΩ bias resistor. The LSF0002 utilizes the VBIAS pin that enables translation by being biased to the same voltage as the lower power supply at the I/Os that is being translated to and from.
The LSF0002 supports bidirectional voltage translation without the need for DIR pin, which minimizes system effort (for PMBus, I2C, SMBus, and so forth). The LSF family of devices supports up to 100MHz up translation and greater than 100MHz down translation at ≤ 30pF capacitive load and up to 40MHz up or down translation at 50pF capacitive load, which allows the LSF family to support more consumer or telecom interfaces (MDIO or SDIO).
LSF family supports 5V tolerance on I/O port, which makes it compatible with TTL levels in industrial and telecom applications. The LSF family can set up different voltage translation levels, which makes it very flexible.
Unlike the LSF0x0x family, the LSF0002 does not require VREF_A and VREF_B power supplies and the 200kΩ bias resistor. The LSF0002 utilizes the VBIAS pin that enables translation by being biased to the same voltage as the lower power supply at the I/Os that is being translated to and from.