The DS90LVRA2-Q1 is a dual CMOS differential line receiver designed for applications requiring high input common mode range, high data rates, and CMOS output with slew rate control. The device is designed to support data rates of 600Mbps (300MHz) utilizing low voltage differential signaling (LVDS) technology.
The DS90LVRA2-Q1 accepts low voltage (350mV typical) differential input signals and translates them from 1.8V to 3.3V CMOS output levels depending on power supply voltage. The DS90LVRA2-Q1 has a flow-through design for easy PCB layout.
The DS90LVRA2-Q1 and companion LVDS line driver DS90LV027AQ provide a new alternative to high power PECL/ECL devices for high speed point-to-point interface applications.
| Type | Title | Date | ||
|---|---|---|---|---|
| * | Data sheet | DS90LVRA2-Q1 Automotive LVDS Dual Differential Line Receiver datasheet | PDF | HTML | 14 Dec 2023 |
| Application brief | Level Shift No More: Support Low Voltage I/O Signals into a FPGA, Processor, or ASIC (Rev. A) | PDF | HTML | 15 Aug 2024 | |
| Application brief | Enabling LVDS Links for Low Power FPGAs, Processors, and ASIC Implementations (Rev. A) | PDF | HTML | 25 Mar 2024 |
For additional terms or required resources, click any title below to view the detail page where available.
The DS90LVRA2 evaluation module (EVM) is a platform for performance and functional evaluation of the DS90LVRA2 LVDS dual differential line receiver.
With this EVM, users can quickly evaluate the output waveform characteristics and signal integrity supported by the DS90LVRA2. SMA allows access to (...)
| Package | Pins | CAD symbols, footprints & 3D models |
|---|---|---|
| WSON (DEM) | 8 | Ultra Librarian |
Content is provided "as is" by TI and community contributors and does not constitute TI specifications. See terms of use.
If you have questions about quality, packaging or ordering TI products, see TI support.