SLVSB09C September   2011  – October 2017 TPS54623

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  VIN and Power VIN Pins (VIN and PVIN)
      2. 7.3.2  Voltage Reference
      3. 7.3.3  Adjusting the Output Voltage
      4. 7.3.4  Safe Start-up into Pre-Biased Outputs
      5. 7.3.5  Error Amplifier
      6. 7.3.6  Slope Compensation
      7. 7.3.7  Enable and Adjusting Undervoltage Lockout
      8. 7.3.8  Slow Start (SS/TR)
      9. 7.3.9  Power Good (PWRGD)
      10. 7.3.10 Bootstrap Voltage (BOOT) and Low Dropout Operation
      11. 7.3.11 Sequencing (SS/TR)
      12. 7.3.12 Output Overvoltage Protection (OVP)
      13. 7.3.13 Overcurrent Protection
        1. 7.3.13.1 High-side MOSFET Overcurrent Protection
        2. 7.3.13.2 Low-side MOSFET Overcurrent Protection
      14. 7.3.14 Thermal Shutdown
      15. 7.3.15 Small Signal Model for Loop Response
      16. 7.3.16 Simple Small Signal Model for Peak Current Mode Control
      17. 7.3.17 Small Signal Model for Frequency Compensation
    4. 7.4 Device Functional Modes
      1. 7.4.1 Fixed Frequency PWM Control
      2. 7.4.2 Continuous Current Mode Operation (CCM)
      3. 7.4.3 Light Load Efficiency Operation
      4. 7.4.4 Adjustable Switching Frequency and Synchronization (RT/CLK)
        1. 7.4.4.1 Adjustable Switching Frequency (RT Mode)
        2. 7.4.4.2 Synchronization (CLK mode)
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Fast Transient Considerations
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1  Custom Design With WEBENCH® Tools
        2. 8.2.2.2  Operating Frequency
        3. 8.2.2.3  Output Inductor Selection
        4. 8.2.2.4  Output Capacitor Selection
        5. 8.2.2.5  Input Capacitor Selection
        6. 8.2.2.6  Slow Start Capacitor Selection
        7. 8.2.2.7  Bootstrap Capacitor Selection
        8. 8.2.2.8  Under Voltage Lockout Set Point
        9. 8.2.2.9  Output Voltage Feedback Resistor Selection
          1. 8.2.2.9.1 Minimum Output Voltage
        10. 8.2.2.10 Compensation Component Selection
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Estimated Circuit Area
    2. 10.2 Layout Examples
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
      2. 11.1.2 Development Support
      3. 11.1.3 Custom Design With WEBENCH® Tools
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Community Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

1 Features

  • Integrated 26 mΩ, 19 mΩ MOSFETs
  • Split Power Rail: 1.6 V to 17 V on PVIN
  • 200 kHz to 1.6 MHz Switching Frequency
  • Light Load Efficient With Pulse Skip
  • Synchronizes to External Clock
  • 0.6 V ±1% Voltage Reference Overtemperature
  • Low 2-µA Shutdown Quiescent Current
  • Monotonic Start-Up into Pre-biased Outputs
  • –40°C to 150°C Operating Junction Temperature Range
  • Adjustable Slow Start and Power Sequencing
  • Power Good Output Monitor for Undervoltage and Overvoltage
  • Adjustable Input Undervoltage Lockout
  • Create a Custom Design Using the TPS54623 With the WEBENCH® Power Designer

2 Applications

  • High Density Distributed Power Systems
  • High Performance Point of Load Regulation
  • Broadband, Networking, and Optical Communications Infrastructure

    • Simplified Schematic

    TPS54623 sim_sch_fp_lvsb09.gif

3 Description

The TPS54623 in thermally enhanced VQFN package is a full featured 17-V, 6-A synchronous step-down converter which is optimized for small designs through high efficiency and integrating the high-side and low-side MOSFETs. Further space savings are achieved through current mode control, which reduces component count, and by selecting a high switching frequency, reducing the inductor's footprint.

The output voltage start-up ramp is controlled by the SS/TR pin, which allows operation as either a stand alone power supply or in tracking situations. Power sequencing is also possible by correctly configuring the enable and the open drain power good pins.

Cycle-by-cycle current limiting on the high-side FET protects the device in overload situations and is enhanced by a low-side sourcing current limit which prevents current runaway. There is also a low-side sinking current limit that turns off the low-side MOSFET to prevent excessive reverse current. Hiccup protection will be triggered if the overcurrent condition has persisted for longer than the preset time. Thermal hiccup protection disables the device when the die temperature exceeds the thermal shutdown temperature and enables the part again after the built-in thermal shutdown hiccup time. The TPS54623 operates at continuous current mode (CCM) at higher load conditions while skipping pulses to boost the efficiency at light loads.

Device Information(1)

PART NUMBER PACKAGE BODY SIZE (NOM)
TPS54623 VQFN (14) 3.50 mm × 3.50 mm
  1. For all available packages, see the orderable addendum at the end of the data sheet.

Efficiency vs Load Current

TPS54623 fig_52_lvsb09.gif

4 Revision History

Changes from B Revision (January 2017) to C Revision

  • Added top nav icon for TI Design Go
  • Added links for WEBENCH on page 1 and in Application and Implementation and Device and Documentation Support sections Go
  • minor editorial edits Go
  • Changed RθJA value from "47.2" to "40.1" Go
  • Changed RθJCtop value from "64.8" to "34.4" Go
  • RθJB value from "14.4" to "11.4" Go
  • Changed ψJB value from "14.7" to "11.4" Go
  • Changed RθJCbot value from "3.2" to "1.8" Go
  • Added new paragraph to end of Sequencing (SS/TR) Go

Changes from A Revision (March 2016) to B Revision

  • Changed Error amplifier dc gain test conditions, VSENSE from 0.8 V to 0.6 V Go
  • Changed the voltage reference (Vref) from 0.8 V to 0.6 V in Slow Start (SS/TR) description. Go
  • Changed "..internal voltage reference of 0.8 V. Above 0.8 V.." to "..internal voltage reference of 0.6 V. Above 0.6 V..." in Minimum Output Voltage description.Go

Changes from * Revision (September 2011) to A Revision

  • Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information sectionGo
  • Deleted Ordering Information tableGo