SCLS336I January   2000  – August 2014 SN74AHCT16373

UNLESS OTHERWISE NOTED, this document contains PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Simplified Schematic
  5. 5 Revision History
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  Handling Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Electrical Characteristics
    6. 7.6  Timing Requirements
    7. 7.7  Switching Characteristics
    8. 7.8  Noise Characteristics
    9. 7.9  Operating Characteristics
    10. 7.10 Typical Characteristics
  8. 8 Parameter Measurement Information
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagrams
    3. 9.3 Feature Description
    4. 9.4 Device Functional Modes
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
      3. 10.2.3 Application Curves
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Related Links
    2. 13.2 Trademarks
    3. 13.3 Electrostatic Discharge Caution
    4. 13.4 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DGG|48
  • DL|48
  • DGV|48
Thermal pad, mechanical data (Package|Pins)
Orderable Information

1 Features

  • Members of the Texas Instruments Widebus™ Family
  • EPIC™ (Enhanced-Performance Implanted CMOS) Process
  • Inputs are TTL-Voltage Compatible
  • Distributed VCC and GND Pins Minimize High-Speed Switching Noise
  • Flow-Through Architecture Optimizes PCB Layout
  • Latch-Up Performance Exceeds 250 mA Per JESD 17
  • ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
  • Package Options Include:
    • Plastic Shrink Small-Outline (DL) Package
    • Thin Shrink Small-Outline (DGG) Package
    • Thin Very Small-Outline (DGV) Package
    • 80-mil Fine-Pitch Ceramic Flat (WD) Package Using 25-mil Center-to-Center Spacings

2 Applications

  • Wearable Health and Fitness Devices
  • Toys
  • PCs and Notebooks
  • Power Infrastructures
  • Servers

3 Description

The SNxAHCT16373 devices are 16-bit transparent D-type latches with 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.

Device Information(1)

PART NUMBER PACKAGE BODY SIZE (NOM)
SNx4AHC16373 TSSOP (48) 12.50 mm × 6.10 mm
TVSOP (48) 9.70 mm × 4.40 mm
SSOP (48) 15.88 mm × 7.49 mm
  1. For all available packages, see the orderable addendum at the end of the data sheet.

4 Simplified Schematic

logic_diag_cls336.gif