SBOS458H December   2008  – June 2015 THS4521 , THS4522 , THS4524

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics: VS+ - VS- = 3.3 V
    6. 7.6 Electrical Characteristics: VS+ - VS- = 5 V
    7. 7.7 Typical Characteristics
    8. 7.8 Typical Characteristics: VS+ - VS- = 3.3 V
    9. 7.9 Typical Characteristics: 5 V
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Frequency Response
      2. 8.3.2  Distortion
      3. 8.3.3  Slew Rate, Transient Response, Settling Time, Output Impedance, Overdrive, Output Voltage, and Turn-On/Turn-Off Time
      4. 8.3.4  Common-Mode and Power-Supply Rejection
      5. 8.3.5  VOCM Input
      6. 8.3.6  Typical Performance Variation With Supply VoltageTypical Performance Variation with Supply Voltage section
      7. 8.3.7  title of Single-Supply Operation sectionSingle-Supply Operation
      8. 8.3.8  Low-Power Applications and the Effects of Resistor Values on Bandwidth
      9. 8.3.9  Frequency Response Variation due to Package Options
      10. 8.3.10 Driving Capacitive Loads
      11. 8.3.11 Audio Performance
      12. 8.3.12 Audio On/Off Pop Performance
    4. 8.4 Device Functional Modes
      1. 8.4.1 Operation from Single-Ended Sources to Differential Outputs
        1. 8.4.1.1 AC-Coupled Signal Path Considerations for Single-Ended Input to Differential Output Conversion
        2. 8.4.1.2 DC-Coupled Input Signal Path Considerations for Single-Ended to Differential Conversion
        3. 8.4.1.3 Resistor Design Equations for the Single-Ended to Differential Configuration of the FDA
        4. 8.4.1.4 Input Impedance for the Single-Ended to Differential FDA Configuration
      2. 8.4.2 Differential-Input to Differential-Output Operation
        1. 8.4.2.1 AC-Coupled, Differential-Input to Differential-Output Design Issues
    5. 8.5 Programming
      1. 8.5.1 Input Common-Mode Voltage Range
        1. 8.5.1.1 Setting the Output Common-Mode Voltage
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 Audio ADC Driver Performance: THS4521 and PCM4204 Combined Performance
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
          1. 9.2.1.2.1 Audio ADC Driver Performance: THS4521 and PCM3168 Combined Performance
        3. 9.2.1.3 Application Curves
      2. 9.2.2 ADC Driver Performance: THS4521 and ADS1278 Combined Performance
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Detailed Design Procedure
          1. 9.2.2.2.1 ADC Driver Performance: THS4521 and ADS8321 Combined Performance
        3. 9.2.2.3 Application Curves
      3. 9.2.3 Differential Input to Differential Output Amplifier
      4. 9.2.4 Single-Ended Input to Differential Output Amplifier
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Third-Party Products Disclaimer
    2. 12.2 Related Links
    3. 12.3 Community Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

1 Features

  • Fully Differential Architecture
  • Bandwidth: 145 MHz (AV = 1 V/V)
  • Slew Rate: 490 V/μs
  • HD2: –133 dBc at 10 kHz (1 VRMS, RL = 1 kΩ)
  • HD3: –141 dBc at 10 kHz (1 VRMS, RL = 1 kΩ)
  • Input Voltage Noise: 4.6 nV/√Hz (f = 100 kHz)
  • THD+N: –112dBc (0.00025%) at 1 kHz (22-kHz BW, G = 1, 5 VPP)
  • Open-Loop Gain: 119 dB (DC)
  • NRI—Negative Rail Input
  • RRO—Rail-to-Rail Output
  • Output Common-Mode Control (with Low Offset)
  • Power Supply:
    • Voltage: +2.5 V (±1.25 V) to +5.5 V (±2.75 V)
    • Current: 1.14 mA/ch
  • Power-Down Capability: 20 μA (typical)

2 Applications

  • Low-Power SAR and ΔΣ ADC Drivers
  • Low-Power Differential Drivers
  • Low-Power Differential Signal Conditioning
  • Low-Power, High-Performance Differential Audio Amplifiers

3 Description

The THS4521, THS4522, and THS4524 family of devices are very low-power, fully differential amplifiers with rail-to-rail output and an input common-mode range that includes the negative rail. These amplifiers are designed for low-power data acquisition systems and high-density applications where power dissipation is a critical parameter, and provide exceptional performance in audio applications.

The family includes single FDA (THS4521), dual FDA (THS4522), and quad FDA (THS4524) versions.

Device Information(1)

PART NUMBER PACKAGE BODY SIZE (NOM)
THS4521 SOIC (8) 4.90 mm × 3.91 mm
VSSOP (8) 3.00 mm × 3.00 mm
THS4522 TSSOP (16) 5.00 mm × 4.40 mm
THS4524 TSSOP (38) 9.70 mm × 4.40 mm
  1. For all available packages, see the package option addendum at the end of the datasheet.

THS4521 and ADS1278 Combined Performance

THS4521 THS4522 THS4524 fp_bos458.gif
For more information on this circuit, view SBAU197.