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DDR-CONFIG-AM62

DDR Configuration Tool

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Latest version
Version: V0.10.10
Release date: 20 Dec 2024
open-in-new

Release notes

Products
Arm-based processors
AM620-Q1 — Automotive Compute SoC with embedded safety for Driver Monitoring, networking and V2X systems AM623 — Internet of Things (IoT) and gateway SoC with Arm® Cortex®-A53-based object and gesture recognition AM625 — Human-machine-interaction SoC with Arm® Cortex®-A53-based edge AI and full-HD dual display AM625-Q1 — Automotive display SoC with embedded safety for digital clusters
Hardware development
Development kit
SK-AM62-LP — AM62x starter kit for low-power Sitara™ processors

Release Information

This tool is intended to simplify the process of configuring the DDR Subsystem Controller and PHY to interface with DRAM memory devices.

What's new

  • fixed errata associated with CA VREF training range
  • restricted some inputs for FSP1 and IO configurations
  • removed parameter tDQSCKmin from DDR4. Not used
  • added support for AM62Dx