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ADS92XX-FPGA-EXAMPLE-CODE

ADS92xx FPGA interface example code

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Latest version
Version: 1.1.0
Release date: 06 Feb 2024
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ADS92xx_verilog_source_v1.1.0.zip  — 43 K

Source code archive

MD5 checksum
Products
Precision ADCs
ADS9218 — Two-channel, simultaneous-sampling, 18-bit 10-MSPS SAR ADC with fully-differential ADC input driver ADS9227 — Two-channel, simultaneous-sampling, 16-bit 5-MSPS SAR ADC with fully-differential ADC input driver ADS9219 — 2-channel, 18-bit, 20 Msps/channel, with ADC driver and reference driver in 6mm x 6mm QFN

Documentation

open-in-new

Manifest

Manifest

Release Information

Verilog modules for interfacing to the ADS92xx.

What's new

  • v1.0.0 - Initial release
  • v1.1.0 - Added posedge_detect.v and updated coding-style