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TIDA-01378

Wideband Receiver Reference Design for Upstream DOCSIS 3.1 Applications

Design files

TIDA-01378

Design files

Overview

This reference design consists of an analog front-end (AFE) signal chain for wideband receiver applications using the LMH2832 digitally controlled variable gain amplifier (DVGA) and ADS54J40 analog-to-digital converter (ADC). The design is primarily targeted for upstream DOCSIS 3.1 receiver applications specified for cable modem termination systems (CMTS) and supports up to 196 MHz of upstream signal bandwidth. The circuit solves the filtering and analog signal processing requirements for the DOCSIS 3.1 standard, which makes it easier for system designers to readily incorporate the design on the CMTS-side of the upstream signal path.

Features
  • AC-coupled signal path from 100 kHz to 204 MHz with 196 MHz of upstream-signal-bandwidth support for DOCSIS 3.1 applications
  • 58 dBFs of minimum system SNR (200 MHz BW) for –1-dBFs input at the ADC
  • 70 dBFs of minimum system SFDR for –1-dBFs input at the ADC
  • 1.71 A of average active-state current consumption on 5-V nominal wall mount power supply
  • Output data rate of four lanes per ADC at 5.0 Gbps with JESD204B interface subclass-1 support
Communications equipment
Personal electronics
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A fully assembled board has been developed for testing and performance validation only, and is not available for sale.

Design files & products

Design files

Download ready-to-use system files to speed your design process.

download Design guide — TIDA-01378
TIDUCG9.PDF (648 K)

Reference design overview and verified performance test data

download Schematic — TIDA-01378
TIDRPN2.PDF (139 K)

Detailed schematic diagram for design layout and components

download Bill of materials (BOM) — TIDA-01378
TIDRPN3.PDF (301 K)

Complete listing of design components, reference designators, and manufacturers/part numbers

download Assembly drawing — TIDA-01378
TIDRPN4.ZIP (2005 K)

Detailed overview of design layout for component placement

download CAD/CAE symbol — TIDA-01378
TIDRPN6.ZIP (444 K)

Files used for 3D models or 2D drawings of IC components

download Gerber file — TIDA-01378
TIDCD46.ZIP (3337 K)

Design file that contains information on physical board layer of design PCB

download PCB layout — TIDA-01378
TIDRPN5.PDF (2660 K)

PCB layer plot file used for generating PCB design layout

Products

Includes TI products in the design and potential alternatives.

AC/DC & DC/DC converters (integrated FET)

TPS54319 — 2.95 V to 6 V input, 3 A, 2 MHz SWIFT™ synchronous step-down converter in a 3 mm x 3 mm QFN package

Data sheet: PDF
Clock jitter cleaners

LMK04828 — Ultra low-noise JESD204B compliant clock jitter cleaner with integrated 2370 to 2630-MHz VCO0.

Data sheet: PDF | HTML
High-speed ADCs (≥10 MSPS)

ADS54J40 — Dual-Channel, 14-Bit, 1.0-GSPS Analog-to-Digital Converter (ADC)

Data sheet: PDF
LVDS, M-LVDS & PECL ICs

SN65LVDS101 — 2-Gbps LVDS, LVPECL & CML to LVPECL repeater/translator

Data sheet: PDF | HTML
LVDS, M-LVDS & PECL ICs

SN65LVDS4 — 500-Mbps LVDS single high-speed receiver

Data sheet: PDF | HTML
Linear & low-dropout (LDO) regulators

TPS735 — 500-mA, low-IQ, low-dropout voltage regulator with enable

Data sheet: PDF | HTML
Linear & low-dropout (LDO) regulators

TPS7A47 — 1-A, 36-V, low-noise, high-PSRR, low-dropout voltage regulator with enable

Data sheet: PDF | HTML
Linear & low-dropout (LDO) regulators

TPS7A8101 — 1-A, high-PSRR, adjustable ultra-low-dropout voltage regulator with enable

Data sheet: PDF | HTML
MOSFETs

CSD17313Q2 — 30-V, N channel NexFET™ power MOSFET, single SON 2 mm x 2 mm, 32 mOhm

Data sheet: PDF | HTML
RF VGAs

LMH2832 — Fully-Differential, Dual, 1.1 GHz Digital Variable Gain Amplifier

Data sheet: PDF | HTML
eFuses & hot swap controllers

TPS2400 — 5.5-V over voltage protection controller with 100-V input transient protection

Data sheet: PDF | HTML

Start development

Software

GUI for evaluation module (EVM)

SLAC594 — ADS54Jxx EVM GUI

Supported products & hardware

Supported products & hardware

Products
Receivers
ADS58J63 — Quad Channel 14-bit 500 Msps Telecom Receiver IC
High-speed ADCs (≥10 MSPS)
ADS54J40 — Dual-Channel, 14-Bit, 1.0-GSPS Analog-to-Digital Converter (ADC) ADS54J60 — Dual-Channel, 16-Bit, 1.0-GSPS Analog-to-Digital Converter (ADC) ADS54J66 — Quad-Channel, 14-Bit, 500-MSPS Analog-to-Digital Converter (ADC) ADS54J69 — Dual-Channel, 16-Bit, 500-MSPS Analog-to-Digital Converter (ADC)
Hardware development
Evaluation board
ADS54J20EVM — ADS54J20 Dual-Channel, 12-Bit, 1.0-GSPS Analog-to-Digital Converter Evaluation Module ADS54J40EVM — ADS54J40 Dual-Channel, 14-Bit, 1.0-GSPS Analog-to-Digital Converter Evaluation Module ADS54J60EVM — ADS54J60 Dual-Channel, 16-Bit, 1.0-GSPS Analog-to-Digital Converter Evaluation Module ADS54J66EVM — ADS54J66 Quad-Channel, 14-Bit, 500-MSPS Analog-to-Digital Converter Evaluation Module ADS54J69EVM — ADS54J69 Dual-Channel, 16-Bit, 500-MSPS Analog-to-Digital Converter Evaluation Module ADS58J63EVM — ADS58J63 Evaluation Module TSW54J60EVM — 400MHz Input Bandwidth Digitizer: Dual 16-Bit, 1-GSPS ADC and Wideband Fixed or Variable Gain Amps
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Technical documentation

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Type Title Date
* Design guide Wideband Receiver Reference Design for Upstream DOCSIS 3.1 Applications Oct. 26, 2016

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