TIDA-00179

Universal Digital Interface to Absolute Position Encoders Reference Design

TIDA-00179

Design files

Overview

TIDA-00179 is an EMC-compliant universal digital interface to connect to absolute position encoders like EnDat 2.2, BiSS®, SSI or HIPERFACE DSL®. This reference design supports a wide-input voltage range from 15 V to 60 V (24-V nom). A connector with 3.3-V logic I/O signals allows for direct interface to the host processor like Sitara AM437x or Delfino F28379 to run the corresponding master protocol.

Master implementations are available on Sitara AM437x (EnDat2.2, BiSS and HIPERFACE DSL) or Delfino DesignDRIVE (EnDat2.2 and BiSS). This design allows the host processor to select between a 4-wire encoder interface like EnDat 2.2 and BiSS or a 2-wire interface with power over RS-485 like HIPERFACE DSL. To meet the selected encoder's supply range, the design offers a programmable output voltage with either 5.25 V or 11 V. The design's power supply offers protection against over-voltage and short circuit according to the selected encoder's voltage range to prevent damage during a cable short. TIDA-00179 has been tested up to 100-m cable length with EnDat 2.2 and 2-wire HIPERFACE DSL encoders.

Features
  • Universal hardware to interface to EnDat 2.2, BiSS, SSI and 4-wire or 2-wire HIPERFACE DSL encoders. It supports all corresponding standard data rates up to at least 100-m cable length.
  • 3.3-V supply half-duplex RS-485 transceiver SN65HVD78 with 12-kV IEC-ESD and 4-kV EFT eliminates cost for external ESD components.
  • Encoder P/S with wide input range (15 V to 60 V) offers programmable output voltage 5.25 V or 11 V, Compliant to EnDat 2.2, BiSS or HIPERFACE DSL encoders
  • OV, UV and precise over-current limit with short-circuit protection leveraging TI eFuse Technology with current monitor and fault indicator
  • Logic interface (3.3-V I/O) to host processors like Sitara AM437x or Delfino F28379 to run the EnDat 2.2, BiSS, SSI or HIPERFACE DSL master. Master implementations are available on Sitara AM437x (EnDat2.2, BiSS and HIPERFACE DSL) or Delfino DesignDRIVE (EnDat2.2 and BiSS).
  • Design exceeds EMC immunity for ESD, fast-transient burst and surge and conducted RF with levels according to IEC61800-3.
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A fully assembled board has been developed for testing and performance validation only, and is not available for sale.

Design files & products

Design files

Download ready-to-use system files to speed your design process.

TIDUAN5A.PDF (3093 K)

Reference design overview and verified performance test data

TIDRHV8.PDF (957 K)

Detailed schematic diagram for design layout and components

TIDRHV9.PDF (57 K)

Complete listing of design components, reference designators, and manufacturers/part numbers

TIDRHW0.PDF (536 K)

Detailed overview of design layout for component placement

TIDRHW2.ZIP (4041 K)

Files used for 3D models or 2D drawings of IC components

TIDCB54.ZIP (559 K)

Design file that contains information on physical board layer of design PCB

TIDRHW1.PDF (4119 K)

PCB layer plot file used for generating PCB design layout

Products

Includes TI products in the design and potential alternatives.

RS-485 & RS-422 transceivers

SN65HVD783.3 V Half-Duplex RS-485, with IEC ESD, 50 Mbps

Data sheet: PDF | HTML
RS-485 & RS-422 transceivers

THVD14503.3-V to 5-V RS-485 transceiver with ±18-kV IEC ESD protection

Data sheet: PDF | HTML
AC/DC & DC/DC converters (integrated FET)

TPS54060A3.5V to 60V Input, 0.5A Step-Down Converter with Eco-Mode

Data sheet: PDF | HTML
AC/DC & DC/DC converters (integrated FET)

TPS540614.7V to 60V Input, 200mA Synchronous Step-Down Converter with Low IQ

Data sheet: PDF | HTML
Analog switches & muxes

SN74CBTLV32573.3-V, 2:1 (SPDT), 4-channel analog switch with partial-power-down mode

Data sheet: PDF | HTML
Analog switches & muxes

TMUX15745-V, 2:1 (SPDT), 4-channel analog switch with powered-off protection & 1.8-V input logic

Data sheet: PDF | HTML
Comparators

LM2903Dual differential comparator

Data sheet: PDF | HTML
MOSFETs

CSD17483F430-V, N channel NexFET™ power MOSFET, single LGA 1 mm x 0.6 mm, 260 mOhm, gate ESD protection

Data sheet: PDF | HTML
MOSFETs

CSD23381F4-12-V, P channel NexFET™ power MOSFET, single LGA 0.6 mm x 1 mm, 175 mOhm, gate ESD protection

Data sheet: PDF | HTML
MOSFETs

CSD25402Q3A-20-V, P channel NexFET™ power MOSFET, single SON 3 mm x 3 mm, 8.9 mOhm

Data sheet: PDF | HTML
eFuses & hot swap controllers

TPS247502.5-V to 18-V, 3mΩ, 0.01-12A eFuse with driver for external blocking FET and latch off

Data sheet: PDF | HTML

Technical documentation

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Type Title Date
* Design guide Universal Digital Interface to Absolute Position Encoders Design Guide (Rev. A) Nov. 23, 2015
Technical article Understanding isolation requirements for industrial drives PDF | HTML Oct. 26, 2016
Technical article Know your electromagnetic compatibility requirements for designing industrial driv PDF | HTML Oct. 12, 2016
Technical article How to integrate position encoder master protocols into Sitara™ processor applicat PDF | HTML Aug. 25, 2016
Technical article Start designing your next Sitara™ processor solution! PDF | HTML Jul. 28, 2016
Technical article Designing an EMC-compliant interface to motor position encoders – Part 6 PDF | HTML Nov. 20, 2015
Technical article Designing an EMC-compliant interface to motor position encoders – Part 5 PDF | HTML Nov. 10, 2015

Related design resources

Reference designs

REFERENCE DESIGN
TIDA-00172 Reference Design for an Interface to a Position Encoder with EnDat 2.2 TIDA-00175 Interface to a 5-V BiSS position encoder reference design TIDA-00177 Two-Wire Interface to a HIPERFACE DSL® Encoder Reference Design TIDEP0022 ARM MPU with Integrated BiSS C Master Interface Reference Design TIDEP0025 Single Chip Drive for Industrial Communications and Motor Control TIDEP0050 EnDat 2.2 System Reference Design

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