CDCDB800 evaluation module is an 8-output LP-HCSL, DB800ZL compliant, clock buffer capable of distributing the reference clock for PCIe® Gen 1 to Gen 5 application, QuickPath Interconnect (QPI), UPI, SAS, and SATA interfaces. The SMBus interface and eight outputs enable pins to allow the configuration and control of all eight outputs individually. The CDCDB800 is a DB800ZL derivative buffer and meets or exceeds the system parameters in the DB800ZL and DB2000Q specifications.
| Type | Title | Date | ||
|---|---|---|---|---|
| * | EVM User's guide | CDCDB800/803 Ultra-Low Additive Jitter, 8-Output PCIe Gen1 to Gen5 Clock Buffer | PDF | HTML | 16 Jul 2021 |
| Certificate | CDCDB800EVM EU Declaration of Conformity (DoC) | 08 Jul 2021 |
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