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TXG4042-Q1

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Automotive ±40V, 4-bit fixed direction ground level translators, 2/2 configuration

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データシート

TXG4042-Q1

プレビュー
データシート ご注文はこちら

製品詳細

Technology family TXG Applications GPIO, I2S, PCM, SPI, UART Bits (#) 4 Configuration 2 Ch A to B 2 Ch B to A High input voltage (min) (V) 0.78 High input voltage (max) (V) 5.5 Vout (min) (V) 0 Vout (max) (V) 5.5 Data rate (max) (Mbps) 100 IOH (max) (mA) -12 IOL (max) (mA) -12 Supply current (max) (µA) 5.5 Features AEC Q100, Partial power down (Ioff) Input type Schmitt-Trigger Output type 3-State Rating Catalog Operating temperature range (°C) -40 to 125
Technology family TXG Applications GPIO, I2S, PCM, SPI, UART Bits (#) 4 Configuration 2 Ch A to B 2 Ch B to A High input voltage (min) (V) 0.78 High input voltage (max) (V) 5.5 Vout (min) (V) 0 Vout (max) (V) 5.5 Data rate (max) (Mbps) 100 IOH (max) (mA) -12 IOL (max) (mA) -12 Supply current (max) (µA) 5.5 Features AEC Q100, Partial power down (Ioff) Input type Schmitt-Trigger Output type 3-State Rating Catalog Operating temperature range (°C) -40 to 125
X2QFN (RUC) 14 4 mm² 2 x 2
  • Supports DC ground shifts up to ±40V
  • AC Noise Rejection up to 130VPP at 1MHz and CMTI of 1kV/µs
  • Low Prop Delay (8.5ns max) and Ch-Ch Skew (2ns max)
  • 100Mbps data rate
  • Low power consumption (0.7mA per channel at 1Mbps, 1.8V)
  • Fully configurable dual-rail design allows each port to operate from 1.71V to 5.5V
  • 4, 2, 1 channel devices with multiple configurations will be available
  • Two device variants:
    • TXG4041: 3 forward, 1 reverse
    • TXG4042: 2 forward, 2 reverse
  • Supports VCC disconnect feature (I/Os are forced into high-Z)
  • Schmitt-trigger inputs allows for slow and noisy signals
  • Inputs with integrated static pull-down resistors prevent channels from floating
  • Operating temperature from –40°C to +125°C
  • Latch-up performance exceeds 100mA per JESD 78, class II
  • ESD protection exceeds JESD 22
    • 2000V human-body model
    • 500V charged-device model
  • Package option: RUC (X2QFN-14)
  • Supports DC ground shifts up to ±40V
  • AC Noise Rejection up to 130VPP at 1MHz and CMTI of 1kV/µs
  • Low Prop Delay (8.5ns max) and Ch-Ch Skew (2ns max)
  • 100Mbps data rate
  • Low power consumption (0.7mA per channel at 1Mbps, 1.8V)
  • Fully configurable dual-rail design allows each port to operate from 1.71V to 5.5V
  • 4, 2, 1 channel devices with multiple configurations will be available
  • Two device variants:
    • TXG4041: 3 forward, 1 reverse
    • TXG4042: 2 forward, 2 reverse
  • Supports VCC disconnect feature (I/Os are forced into high-Z)
  • Schmitt-trigger inputs allows for slow and noisy signals
  • Inputs with integrated static pull-down resistors prevent channels from floating
  • Operating temperature from –40°C to +125°C
  • Latch-up performance exceeds 100mA per JESD 78, class II
  • ESD protection exceeds JESD 22
    • 2000V human-body model
    • 500V charged-device model
  • Package option: RUC (X2QFN-14)

The TXG404x-Q1 is a 4-bit, fixed direction, non-galvanic based voltage and ground-level translator that can support both logic-level shifting between 1.71V to 5.5V and ground-level shifting up to ±40V. Compared to traditional level shifters, the TXG404x-Q1 family can solve the challenges of voltage translation across different ground levels. The Simplified Block Diagram shows a common use case where there is a DC shift between GNDA to GNDB due to parasitic resistance or capacitance.

VCCA is referenced to GNDA and VCCB is referenced to GNDB. Ax pins are referenced to VCCA logic levels while Bx pins are referenced to VCCB logic levels. Both A port and B port can accept voltages from 1.71V to 5.5V. This device includes two enable pins that can place the respective outputs in a high-impedance state when the OE pin is connected to GND or left floating. In the event of input power or signal loss, the output is default low when OE is High (refer to ). The max leakage between GNDA and GNDB is 2µA when VCC to GND is shorted.

The TXG404x-Q1 device helps improve noise immunity and power sequencing across different ground domains while providing low power consumption, latency and channel-to-channel skew. It can supress noise levels at 130VPP up to 1MHz (Figure 6-1). This device can support multiple interfaces such as SPI, UART, GPIO, and I2S.

The TXG404x-Q1 is a 4-bit, fixed direction, non-galvanic based voltage and ground-level translator that can support both logic-level shifting between 1.71V to 5.5V and ground-level shifting up to ±40V. Compared to traditional level shifters, the TXG404x-Q1 family can solve the challenges of voltage translation across different ground levels. The Simplified Block Diagram shows a common use case where there is a DC shift between GNDA to GNDB due to parasitic resistance or capacitance.

VCCA is referenced to GNDA and VCCB is referenced to GNDB. Ax pins are referenced to VCCA logic levels while Bx pins are referenced to VCCB logic levels. Both A port and B port can accept voltages from 1.71V to 5.5V. This device includes two enable pins that can place the respective outputs in a high-impedance state when the OE pin is connected to GND or left floating. In the event of input power or signal loss, the output is default low when OE is High (refer to ). The max leakage between GNDA and GNDB is 2µA when VCC to GND is shorted.

The TXG404x-Q1 device helps improve noise immunity and power sequencing across different ground domains while providing low power consumption, latency and channel-to-channel skew. It can supress noise levels at 130VPP up to 1MHz (Figure 6-1). This device can support multiple interfaces such as SPI, UART, GPIO, and I2S.
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* データシート TXG404x-Q1 4-Bit, ± 40V Ground-Level Translator データシート PDF | HTML 2025年 2月 18日

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X2QFN (RUC) 14 Ultra Librarian
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