UCC21520-Q1
Automotive 4-A, 6-A, 5.7-kVRMS isolated dual-channel gate driver with dual input, disable, deadtime
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Pin-for-pin with same functionality to the compared device
UCC21520-Q1
- Qualified for automotive applications
- AEC-Q100 qualified with the following results:
- Device temperature grade 1
- Functional safety quality-managed
- Junction temperature range –40 to +150°C
- Switching parameters:
- 33ns typical propagation delay
- 20ns minimum pulse width
- 6ns maximum pulse-width distortion
- Common-mode transient immunity (CMTI) greater than 125V/ns
- Surge immunity up to 10kV
- Isolation barrier life >40 years
- 4A peak source, 6A peak sink output
- 3V to 18V input VCCI range to interface with both digital and analog controllers
- Up to 25V VDD output drive supply
- 5V and 8V VDD UVLO options
- Programmable overlap and dead time
- Fast disable for power sequencing
- Safety-related certifications:
- 8000VPK reinforced Isolation per DIN EN IEC 60747-17 (VDE 0884-17)
- 5.7kVRMS isolation for 1 minute per UL 1577
- CSA certification per IEC 60950-1, IEC 62368-1, IEC 61010-1 and IEC 60601-1 end equipment standards
- CQC certification per GB4943.1-2022
The UCC21520-Q1 is an isolated dual-channel gate driver with 4A source and 6A sink peak current. It is designed to drive power MOSFETs, IGBTs, and SiC MOSFETs up to 5MHz.
The input side is isolated from the two output drivers by a 5.7kVRMS reinforced isolation barrier, with a minimum of 125V/ns common-mode transient immunity (CMTI). Internal functional isolation between the two secondary-side drivers allows a working voltage of up to 1500VDC.
Every driver can be configured as two low-side drivers, two high-side drivers, or a half-bridge driver with programmable dead time (DT). A disable pin shuts down both outputs simultaneously , and allows normal operation when left open or grounded. As a fail-safe measure, primary-side logic failures force both outputs low.
Each device accepts VDD supply voltages up to 25V. A wide input VCCI range from 3V to 18V makes the driver suitable for interfacing with both analog and digital controllers. All supply voltage pins have under voltage lock-out (UVLO) protection.
With all these advanced features, the UCC21520-Q1 enables high efficiency, high power density, and robustness.
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Technical documentation
Design & development
For additional terms or required resources, click any title below to view the detail page where available.
UCC21520EVM-286 — UCC21520 4A/6A isolated dual-channel gate driver evaluation module
UCC21520EVM-286 is designed for evaluating UCC21520DW, which is an isolated dual-channel gate driver with 4-A source and 6-A sink peak current capability. This EVM could be served as a reference design for driving power MOSFETS, IGBTS, and SiC MOSFETS with UCC21520 pin function identification, (...)
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Package | Pins | CAD symbols, footprints & 3D models |
---|---|---|
SOIC (DW) | 16 | Ultra Librarian |
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