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TS3A24159

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0.3-Ω on-state resistance, 3.3-V, 2:1 (SPDT), 2-channel analog switch with 1.8-V input logic

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Data sheet

TS3A24159

ACTIVE
Data sheet Order now

Product details

Configuration 2:1 SPDT Number of channels 2 Power supply voltage - single (V) 1.8, 2.5, 3.3 Protocols Analog, I2C, UART Ron (typ) (Ω) 0.26 CON (typ) (pF) 250 ON-state leakage current (max) (µA) 0.1 Supply current (typ) (µA) 0.01 Bandwidth (MHz) 23 Operating temperature range (°C) -40 to 85 Features 1.8-V compatible control inputs, Break-before-make Input/output continuous current (max) (mA) 300 Rating Catalog Drain supply voltage (max) (V) 3.6 Supply voltage (max) (V) 3.6
Configuration 2:1 SPDT Number of channels 2 Power supply voltage - single (V) 1.8, 2.5, 3.3 Protocols Analog, I2C, UART Ron (typ) (Ω) 0.26 CON (typ) (pF) 250 ON-state leakage current (max) (µA) 0.1 Supply current (typ) (µA) 0.01 Bandwidth (MHz) 23 Operating temperature range (°C) -40 to 85 Features 1.8-V compatible control inputs, Break-before-make Input/output continuous current (max) (mA) 300 Rating Catalog Drain supply voltage (max) (V) 3.6 Supply voltage (max) (V) 3.6
DSBGA (YZP) 10 2.8125 mm² 2.25 x 1.25 VSON (DRC) 10 9 mm² 3 x 3 VSSOP (DGS) 10 14.7 mm² 3 x 4.9
  • Specified break-before-make switching
  • Low ON-state resistance (0.3 Ω maximum)
  • Low charge injection
  • Excellent ON-state resistance matching
  • Low total harmonic distortion (THD)
  • 1.65-V to 3.6-V single-supply operation
  • Control inputs are 1.8-V logic compatible
  • Latch-up performance exceeds 100 mA per JESD 78, Class II
  • ESD performance tested per JESD 22
    • 2000-V Human-Body Model (A114-B, Class II)
    • 1000-V Charged-Device Model (C101)
  • Specified break-before-make switching
  • Low ON-state resistance (0.3 Ω maximum)
  • Low charge injection
  • Excellent ON-state resistance matching
  • Low total harmonic distortion (THD)
  • 1.65-V to 3.6-V single-supply operation
  • Control inputs are 1.8-V logic compatible
  • Latch-up performance exceeds 100 mA per JESD 78, Class II
  • ESD performance tested per JESD 22
    • 2000-V Human-Body Model (A114-B, Class II)
    • 1000-V Charged-Device Model (C101)

The TS3A24159 is a 2-channel single-pole double-throw (SPDT) bidirectional analog switch that is designed to operate from 1.65 V to 3.6 V. It offers low ON-state resistance and excellent ON-state resistance matching with the break-before-make feature, to prevent signal distortion during the transferring of a signal from one channel to another. The device has excellent total harmonic distortion (THD) performance, low ON-state resistence, and consumes very low power. These are some of the features that make this device suitable for a variety of markets and many different applications.

The TS3A24159 is a 2-channel single-pole double-throw (SPDT) bidirectional analog switch that is designed to operate from 1.65 V to 3.6 V. It offers low ON-state resistance and excellent ON-state resistance matching with the break-before-make feature, to prevent signal distortion during the transferring of a signal from one channel to another. The device has excellent total harmonic distortion (THD) performance, low ON-state resistence, and consumes very low power. These are some of the features that make this device suitable for a variety of markets and many different applications.
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Technical documentation

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Type Title Date
* Data sheet TS3A24159 0.3-Ω 2-Channel SPDT Bidirectional Analog Switch Dual-Channel 2:1 Multiplexer and Demultiplexer datasheet (Rev. H) PDF | HTML 02 Aug 2022
Application brief 1.8-V Logic for Multiplexers and Signal Switches (Rev. C) PDF | HTML 26 Jul 2022
Application note Selecting the Correct Texas Instruments Signal Switch (Rev. E) PDF | HTML 02 Jun 2022
Application note Multiplexers and Signal Switches Glossary (Rev. B) PDF | HTML 01 Dec 2021
Application brief Improving Pulse Oximeter Solution Performance without Sacrificing Size (Rev. A) PDF | HTML 26 Apr 2021
Application note Preventing Excess Power Consumption on Analog Switches 03 Jul 2008
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 08 Jul 2004

Design & development

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User guide: PDF
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Interface adapter

LEADLESS-ADAPTER1 — Surface mount to DIP header adapter for testing of TI's 6,8,10,12,14,16, & 20-pin leadless packages

The EVM-LEADLESS1 board allows for quick testing and bread boarding of TI's common leadless packages.  The board has footprints to convert TI's DRC, DTP, DQE, RBW, RGY, RSE, RSV, RSW RTE, RTJ, RUK , RUC, RUG, RUM,RUT and YZP surface mount packages to 100mil DIP headers.
User guide: PDF
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Simulation model

HSPICE Model for TS3A24159

SCDM119.ZIP (101 KB) - HSpice Model
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Simulation model

TS3A24159 IBIS Model

SCDM118.ZIP (68 KB) - IBIS Model
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Package Pins CAD symbols, footprints & 3D models
DSBGA (YZP) 10 Ultra Librarian
VSON (DRC) 10 Ultra Librarian
VSSOP (DGS) 10 Ultra Librarian
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