TPS75125-EP is a low-dropout regulator with a power good (PG) function. Quiescent current is 75 µA at full load and drops down to 1 µA when the device is disabled. TPS75125-EP is designed to have fast transient response for larger load current changes.
Because the PMOS device behaves as a low-value resistor, the dropout voltage is very low and is directly proportional to the output current. Additionally, since the PMOS pass element is a voltage-driven device, the quiescent current is very low and independent of output loading (typically 75 µA over the full range of output current, 1 mA to 1.5 A). These two key specifications yield a significant improvement in operating life for battery-powered systems.
The device is enabled when the enable (EN) input is connected to a low-level voltage. This low dropout (LDO) device also features a sleep mode; applying a TTL high signal to EN shuts down the regulator, reducing the quiescent current to less than 1 µA at TJ = 25°C.
The TPS75125-EP power good (PG) terminal is an active-high, open-drain output that can be used to implement a power-on reset or a low-battery indicator.
The TPS75125-EP is offered in a 2.5 V fixed-voltage version. Output voltage tolerance is specified as a maximum of 3% over line, load, and temperature ranges. The TPS75125-EP is available in a 20-pin TSSOP (PWP) package.
TPS75125-EP is a low-dropout regulator with a power good (PG) function. Quiescent current is 75 µA at full load and drops down to 1 µA when the device is disabled. TPS75125-EP is designed to have fast transient response for larger load current changes.
Because the PMOS device behaves as a low-value resistor, the dropout voltage is very low and is directly proportional to the output current. Additionally, since the PMOS pass element is a voltage-driven device, the quiescent current is very low and independent of output loading (typically 75 µA over the full range of output current, 1 mA to 1.5 A). These two key specifications yield a significant improvement in operating life for battery-powered systems.
The device is enabled when the enable (EN) input is connected to a low-level voltage. This low dropout (LDO) device also features a sleep mode; applying a TTL high signal to EN shuts down the regulator, reducing the quiescent current to less than 1 µA at TJ = 25°C.
The TPS75125-EP power good (PG) terminal is an active-high, open-drain output that can be used to implement a power-on reset or a low-battery indicator.
The TPS75125-EP is offered in a 2.5 V fixed-voltage version. Output voltage tolerance is specified as a maximum of 3% over line, load, and temperature ranges. The TPS75125-EP is available in a 20-pin TSSOP (PWP) package.