The TL16C750E is a single universal asynchronous receiver transmitter (UART) with 128-byte FIFOs, fractional baud rate support, automatic hardware, software flow control and data rates up to 6 Mbps. The device offers enhanced features such as fractional baud rate and a transmission character control register (TCR) that stores received FIFO threshold level to start or stop transmission during hardware and software flow control automatically without intervention from the CPU.
With the FIFO RDY register, the software gets the status of TXRDY or RXRDY, saving extra GPIO usage. On-chip status registers provide the user with error indications, operational status, and modem interface control. System interrupts may be tailored to meet user requirements. An internal loop-back capability allows onboard diagnostics. The TL16C750E incorporates the functionality of UART, the UART having its own register set and FIFO.
This version includes the Alternate Function Register (AFR) and this is used to enable some extra functionality beyond the capabilities of the TL16C750 version. One addition is the IrDA mode, which supports Standard IrDA (SIR) mode with baud rates from 2400 to 115.2 kbps. The third addition is support for RS-485 bus drivers or transceivers by providing an output pin (DTRx) per channel, which is timed to keep the RS-485 driver enabled as long as transmit data is pending.
Another name for the UART function is asynchronous communications element (ACE), and these terms are used interchangeably. The bulk of this document describes the behavior of each ACE, with the understanding that two such devices are incorporated into the TL16C750E device.
The TL16C750E is a single universal asynchronous receiver transmitter (UART) with 128-byte FIFOs, fractional baud rate support, automatic hardware, software flow control and data rates up to 6 Mbps. The device offers enhanced features such as fractional baud rate and a transmission character control register (TCR) that stores received FIFO threshold level to start or stop transmission during hardware and software flow control automatically without intervention from the CPU.
With the FIFO RDY register, the software gets the status of TXRDY or RXRDY, saving extra GPIO usage. On-chip status registers provide the user with error indications, operational status, and modem interface control. System interrupts may be tailored to meet user requirements. An internal loop-back capability allows onboard diagnostics. The TL16C750E incorporates the functionality of UART, the UART having its own register set and FIFO.
This version includes the Alternate Function Register (AFR) and this is used to enable some extra functionality beyond the capabilities of the TL16C750 version. One addition is the IrDA mode, which supports Standard IrDA (SIR) mode with baud rates from 2400 to 115.2 kbps. The third addition is support for RS-485 bus drivers or transceivers by providing an output pin (DTRx) per channel, which is timed to keep the RS-485 driver enabled as long as transmit data is pending.
Another name for the UART function is asynchronous communications element (ACE), and these terms are used interchangeably. The bulk of this document describes the behavior of each ACE, with the understanding that two such devices are incorporated into the TL16C750E device.