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Noninverting buffers & drivers

SN74LVC1G07

ACTIVE

Single 1.65-V to 5.5-V buffer with open-drain outputs

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Data sheet

SN74LVC1G07

ACTIVE
Data sheet Order now

Product details

Technology family LVC Supply voltage (min) (V) 1.65 Supply voltage (max) (V) 5.5 Number of channels 1 IOL (max) (mA) 32 Supply current (max) (µA) 10 IOH (max) (mA) 0 Input type Standard CMOS Output type Open-drain Features Over-voltage tolerant inputs, Partial power down (Ioff), Very high speed (tpd 5-10ns) Rating Catalog Operating temperature range (°C) -40 to 125
Technology family LVC Supply voltage (min) (V) 1.65 Supply voltage (max) (V) 5.5 Number of channels 1 IOL (max) (mA) 32 Supply current (max) (µA) 10 IOH (max) (mA) 0 Input type Standard CMOS Output type Open-drain Features Over-voltage tolerant inputs, Partial power down (Ioff), Very high speed (tpd 5-10ns) Rating Catalog Operating temperature range (°C) -40 to 125
DSBGA (YZP) 5 2.1875 mm² 1.75 x 1.25 DSBGA (YZV) 4 1.5625 mm² 1.25 x 1.25 SOT-23 (DBV) 5 8.12 mm² 2.9 x 2.8 SOT-5X3 (DRL) 5 2.56 mm² 1.6 x 1.6 SOT-SC70 (DCK) 5 4.2 mm² 2 x 2.1 USON (DRY) 6 1.45 mm² 1.45 x 1 X2SON (DPW) 5 0.64 mm² 0.8 x 0.8 X2SON (DSF) 6 1 mm² 1 x 1
  • Available in the Ultra Small 0.64-mm2 Package (DPW) With 0.5-mm Pitch
  • Supports 5-V VCC Operation
  • Input and Open-Drain Output Accept Voltages up to 5.5 V
  • Can Translate Up or Down
  • Max tpd of 4.2 ns at 3.3 V
  • Low Power Consumption, 10-µA Max ICC
  • ±24-mA Output Drive at 3.3 V
  • Ioff Supports Live Insertion, Partial-Power-Down Mode, and Back-Drive Protection
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)
  • Available in the Ultra Small 0.64-mm2 Package (DPW) With 0.5-mm Pitch
  • Supports 5-V VCC Operation
  • Input and Open-Drain Output Accept Voltages up to 5.5 V
  • Can Translate Up or Down
  • Max tpd of 4.2 ns at 3.3 V
  • Low Power Consumption, 10-µA Max ICC
  • ±24-mA Output Drive at 3.3 V
  • Ioff Supports Live Insertion, Partial-Power-Down Mode, and Back-Drive Protection
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)

This single buffer/driver is designed for 1.65-V to 5.5-V VCC operation.

The output of the SN74LVC1G07 device is open drain and can be connected to other open-drain outputs to implement active-low wired-OR or active-high wired-AND functions. The maximum sink current is 32 mA.

The SN74LVC1G07 is available in a variety of packages, including the ultra-small DPW package with a body size of 0.8 mm × 0.8 mm.

This single buffer/driver is designed for 1.65-V to 5.5-V VCC operation.

The output of the SN74LVC1G07 device is open drain and can be connected to other open-drain outputs to implement active-low wired-OR or active-high wired-AND functions. The maximum sink current is 32 mA.

The SN74LVC1G07 is available in a variety of packages, including the ultra-small DPW package with a body size of 0.8 mm × 0.8 mm.
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Technical documentation

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* Data sheet SN74LVC1G07 Single Buffer/Driver With Open-Drain Output datasheet (Rev. AE) PDF | HTML 21 Sep 2020
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User guide Signal Switch Data Book (Rev. A) 14 Nov 2003
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User guide LVC and LV Low-Voltage CMOS Logic Data Book (Rev. B) 18 Dec 2002
Application note Texas Instruments Little Logic Application Report 01 Nov 2002
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More literature Standard Linear & Logic for PCs, Servers & Motherboards 13 Jun 2002
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Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

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Flexible EVM designed to support any device that has a DCK, DCT, DCU, DRL, or DBV package in a 5 to 8 pin count.
User guide: PDF
Not available on TI.com
Development kit

EVMK2GX — 66AK2Gx 1GHz evaluation module

The EVMK2GX (also known as "K2G") 1GHz evaluation module (EVM) enables developers to immediately start evaluating the 66AK2Gx processor family, and to accelerate the development of audio, industrial motor control, smart grid protection and other high reliability, real-time compute intensive (...)

User guide: PDF
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Simulation model

HSpice Model of SN74LVC1G07

SCAJ005.ZIP (38 KB) - HSpice Model
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Simulation model

SN74LVC1G07 Behavioral SPICE Model

SCAM106.ZIP (7 KB) - PSpice Model
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Simulation model

SN74LVC1G07 IBIS Model (Rev. E)

SCAM005E.ZIP (33 KB) - IBIS Model
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Simulation model

SN74LVC1G07 PSpice Model

SCEM571.ZIP (19 KB) - PSpice Model
Download

Many TI reference designs include the SN74LVC1G07

Use our reference design selection tool to review and identify designs that best match your application and parameters.

View reference designs
Package Pins CAD symbols, footprints & 3D models
DSBGA (YZP) 5 Ultra Librarian
DSBGA (YZV) 4 Ultra Librarian
SOT-23 (DBV) 5 Ultra Librarian
SOT-5X3 (DRL) 5 Ultra Librarian
SOT-SC70 (DCK) 5 Ultra Librarian
USON (DRY) 6 Ultra Librarian
X2SON (DPW) 5 Ultra Librarian
X2SON (DSF) 6 Ultra Librarian
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