The SN74AXCH1T45 is a single-bit noninverting bus transceiver that uses two individually configurable power-supply rails. The device is operational with both VCCA and VCCB supplies as low as 0.65 V. The A port is designed to track VCCA, which accepts any supply voltage from 0.65 V to 3.6 V. The B port is designed to track VCCB, which also accepts any supply voltage from 0.65 V to 3.6 V. Additionally the SN74AXCH1T45 is compatible with a single-supply system.
The DIR pin determines the direction of signal propagation. With the DIR pin configured HIGH, translation is from Port A to Port B. With DIR configured LOW, translation is from Port B to Port A. The DIR pin is referenced to VCCA, meaning that its logic-high and logic-low thresholds track with VCCA.
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended. If a supply is present for VCCA or VCCB, the bus-hold circuitry always remains active on the A or B inputs respectively, independent of the state of the direction control pin.
This device is fully specified for partial-power-down applications using the Ioff current. The Ioff protection circuitry ensures that no excessive current is drawn from or to an input, output, or combined I/O that is biased to a specific voltage while the device is powered down.
The VCC isolation feature ensures that if either VCCA or VCCB is less than 100 mV, both I/O ports enter a high-impedance state by disabling their outputs.
Glitch-free power supply sequencing allows either supply rail to be powered on or off in any order while providing robust power sequencing performance.
| Type | Title | Date | ||
|---|---|---|---|---|
| * | Data sheet | SN74AXCH1T45 Single-Bit Dual-Supply Bus Transceiver with Configurable Voltage Translation, Tri-State Outputs, and Bus-Hold Inputs datasheet (Rev. C) | PDF | HTML | 09 Sep 2020 |
| Application note | Schematic Checklist - A Guide to Designing With Fixed or Direction Control Translators | PDF | HTML | 02 Oct 2024 | |
| Application note | Schematic Checklist - A Guide to Designing with Auto-Bidirectional Translators | PDF | HTML | 12 Jul 2024 | |
| Application note | Understanding Transient Drive Strength vs. DC Drive Strength in Level-Shifters (Rev. A) | PDF | HTML | 03 Jul 2024 | |
| Selection guide | Voltage Translation Buying Guide (Rev. A) | 15 Apr 2021 | ||
| Application note | Low Voltage Translation for SPI, UART, RGMII, JTAG Interfaces (Rev. B) | PDF | HTML | 29 Mar 2021 | |
| Application note | Glitch free power sequencing with AXC level translators (Rev. A) | 20 Sep 2018 | ||
| Application note | An Overview of Bus-Hold Circuit and the Applications (Rev. B) | 17 Sep 2018 |
For additional terms or required resources, click any title below to view the detail page where available.
The generic EVM is designed to support one, two, four and eight channel LVC and AVC direction-controlled translation devices. It also supports the bus hold and automotive -Q1 devices in the same number of channels. The AVC are low voltage translation devices with lower drive strength of 12mA. LVC (...)
| Package | Pins | CAD symbols, footprints & 3D models |
|---|---|---|
| SOT-23 (DBV) | 6 | Ultra Librarian |
| SOT-SC70 (DCK) | 6 | Ultra Librarian |
| USON (DRY) | 6 | Ultra Librarian |
| X2SON (DTQ) | 6 | Ultra Librarian |
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