Wide operating range of 1.2V to 5.5V
Single-supply voltage translator:
Up translation:
1.2V to 1.8V
1.5V to 2.5V
1.8V to 3.3V
3.3V to 5.0V
Down translation:
The SN54SC8T541-SEP contains eight buffers with 3-state outputs. The active low output enable pins (OE1 and OE2) control all eight channels, and are configured so that both must be low for the outputs to be active. When the outputs are enabled, the outputs are actively driven low or high. When the outputs are disabled, the outputs are set into the high-impedance state. The output level is referenced to the supply voltage (VCC) and supports 1.8V, 2.5V, 3.3V, and 5V CMOS levels.
The input is designed with a lower threshold circuit to support up translation for lower voltage CMOS inputs (for example, 1.2V input to 1.8V output or 1.8V input to 3.3V output). In addition, the 5V tolerant input pins enable down translation (for example, 3.3V to 2.5V output).
| Type | Title | Date | ||
|---|---|---|---|---|
| * | Data sheet | SN54SC8T541-SEP Radiation Tolerant, Octal Buffers and Line Drivers With 3-State Outputs and Logic Level Shifter datasheet | PDF | HTML | 19 Apr 2024 |
| Application note | Schematic Checklist - A Guide to Designing With Fixed or Direction Control Translators | PDF | HTML | 02 Oct 2024 |
For additional terms or required resources, click any title below to view the detail page where available.
The 14-24-LOGIC-EVM evaluation module (EVM) is designed to support any logic device that is in a 14-pin to 24-pin D, DW, DB, NS, PW, DYY or DGV package,
| Package | Pins | CAD symbols, footprints & 3D models |
|---|---|---|
| TSSOP (PW) | 20 | Ultra Librarian |
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