SN54HC273-SP

ACTIVE

Product details

Number of channels 8 Technology family HC Supply voltage (min) (V) 2 Supply voltage (max) (V) 6 Input type Standard CMOS Output type Push-Pull Clock frequency (max) (MHz) 25 IOL (max) (mA) 5.2 IOH (max) (mA) -5.2 Supply current (max) (µA) 80 Features Balanced outputs, High speed (tpd 10-50ns), Positive input clamp diode Operating temperature range (°C) -55 to 125 Rating Space
Number of channels 8 Technology family HC Supply voltage (min) (V) 2 Supply voltage (max) (V) 6 Input type Standard CMOS Output type Push-Pull Clock frequency (max) (MHz) 25 IOL (max) (mA) 5.2 IOH (max) (mA) -5.2 Supply current (max) (µA) 80 Features Balanced outputs, High speed (tpd 10-50ns), Positive input clamp diode Operating temperature range (°C) -55 to 125 Rating Space
CDIP (J) 20 167.464 mm² 24.2 x 6.92 CFP (W) 20 90.5828 mm² 13.09 x 6.92
  • Wide operating voltage range of 2 V to 6 V
  • Outputs can drive up to 10 LSTTL loads
  • Low power consumption, 80-µA maximum ICC
  • Typical tpd = 12 ns
  • ±4-mA output drive at 5 V
  • Low input current of 1-µA maximum
  • Contain eight flip-flops with single-rail outputs
  • Direct clear input
  • Individual data input to each flip-flop
  • On products compliant to MIL-PRF-38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters.
  • Wide operating voltage range of 2 V to 6 V
  • Outputs can drive up to 10 LSTTL loads
  • Low power consumption, 80-µA maximum ICC
  • Typical tpd = 12 ns
  • ±4-mA output drive at 5 V
  • Low input current of 1-µA maximum
  • Contain eight flip-flops with single-rail outputs
  • Direct clear input
  • Individual data input to each flip-flop
  • On products compliant to MIL-PRF-38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters.

The SNx4HC273 devices are positive-edge-triggered D-type flip-flops with a direct active low clear ( CLR) input.

Information at the data (D) inputs meeting the setup time requirements is transferred to the Q outputs on the positive-going edge of the clock (CLK) pulse. Clock triggering occurs at a particular voltage level and is not related directly to the transition time of the positive-going pulse. When CLK is at either the high or low level, the D input has no effect at the output.

The SNx4HC273 devices are positive-edge-triggered D-type flip-flops with a direct active low clear ( CLR) input.

Information at the data (D) inputs meeting the setup time requirements is transferred to the Q outputs on the positive-going edge of the clock (CLK) pulse. Clock triggering occurs at a particular voltage level and is not related directly to the transition time of the positive-going pulse. When CLK is at either the high or low level, the D input has no effect at the output.

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* Data sheet SNx4HC273 Octal D-Type Flip-Flops With Clear datasheet (Rev. F) PDF | HTML 21 Apr 2022

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