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SN54BCT374

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Octal Edge-Triggered D-type Flip-Flops With 3-State Outputs

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Data sheet

SN54BCT374

ACTIVE
Data sheet Order now

Product details

Number of channels 8 Technology family BCT Supply voltage (min) (V) 4.5 Supply voltage (max) (V) 5.5 Input type TTL-Compatible CMOS Output type 3-State Clock frequency (max) (MHz) 70 IOL (max) (mA) 48 IOH (max) (mA) -12 Supply current (max) (µA) 60000 Features Very high speed (tpd 5-10ns) Operating temperature range (°C) -55 to 125 Rating Military
Number of channels 8 Technology family BCT Supply voltage (min) (V) 4.5 Supply voltage (max) (V) 5.5 Input type TTL-Compatible CMOS Output type 3-State Clock frequency (max) (MHz) 70 IOL (max) (mA) 48 IOH (max) (mA) -12 Supply current (max) (µA) 60000 Features Very high speed (tpd 5-10ns) Operating temperature range (°C) -55 to 125 Rating Military
CDIP (J) 20 167.464 mm² 24.2 x 6.92 CFP (W) 20 90.5828 mm² 13.09 x 6.92 LCCC (FK) 20 79.0321 mm² 8.89 x 8.89
  • Operating Voltage Range of 4.5 V to 5.5 V
  • BiCMOS Design Significantly Reduces ICCZ Over TTL Designs
  • Full Parallel Access for Loading
  • Buffered Control Inputs
  • 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers
  • Operating Voltage Range of 4.5 V to 5.5 V
  • BiCMOS Design Significantly Reduces ICCZ Over TTL Designs
  • Full Parallel Access for Loading
  • Buffered Control Inputs
  • 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers

The SNx4BCT374 devices contain eight channels of D-type flip-flops with a shared clock (CLK) and output enable (OE) pin.

The SNx4BCT374 devices contain eight channels of D-type flip-flops with a shared clock (CLK) and output enable (OE) pin.
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Technical documentation

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Type Title Date
* Data sheet SNx4BCT374 Octal Edge-Triggered D-Type Latches With 3-State Outputs datasheet (Rev. D) PDF | HTML 19 Feb 2021
* SMD SN54BCT374 SMD 5962-90516 21 Jun 2016
Application note Power-Up Behavior of Clocked Devices (Rev. B) PDF | HTML 15 Dec 2022
Application note Implications of Slow or Floating CMOS Inputs (Rev. E) 26 Jul 2021
Selection guide Logic Guide (Rev. AB) 12 Jun 2017
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 02 Dec 2015
User guide LOGIC Pocket Data Book (Rev. B) 16 Jan 2007
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 08 Jul 2004
Application note TI IBIS File Creation, Validation, and Distribution Processes 29 Aug 2002
Application note Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A) 01 Aug 1997
Application note Designing With Logic (Rev. C) 01 Jun 1997
Application note Input and Output Characteristics of Digital Integrated Circuits 01 Oct 1996
Application note Live Insertion 01 Oct 1996

Design & development

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Package Pins CAD symbols, footprints & 3D models
CDIP (J) 20 Ultra Librarian
CFP (W) 20 Ultra Librarian
LCCC (FK) 20 Ultra Librarian
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