The \x92FCT574T devices are high-speed, low-power, octal D-type flip-flops, featuring separate D-type inputs for
each flip-flop. These devices have 3-state outputs for bus-oriented applications. A buffered clock (CP) and
output-enable (OE\) inputs are common to all flip-flops. The \x92FCT574T are identical to \x92FCT374T, except for a
flow-through pinout to simplify board design. The eight flip-flops in the \x92FCT574T store the state of their
individual D inputs that meet the setup-time and hold-time requirements on the low-to-high CP transition. When
OE\ is low, the contents of the eight flip-flops are available at the outputs. When OE\ is high, the outputs are in
the high-impedance state. The state of OE\ does not affect the state of the flip-flops.
These devices are fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the
outputs, preventing damaging current backflow through the device when it is powered down.
The \x92FCT574T devices are high-speed, low-power, octal D-type flip-flops, featuring separate D-type inputs for
each flip-flop. These devices have 3-state outputs for bus-oriented applications. A buffered clock (CP) and
output-enable (OE\) inputs are common to all flip-flops. The \x92FCT574T are identical to \x92FCT374T, except for a
flow-through pinout to simplify board design. The eight flip-flops in the \x92FCT574T store the state of their
individual D inputs that meet the setup-time and hold-time requirements on the low-to-high CP transition. When
OE\ is low, the contents of the eight flip-flops are available at the outputs. When OE\ is high, the outputs are in
the high-impedance state. The state of OE\ does not affect the state of the flip-flops.
These devices are fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the
outputs, preventing damaging current backflow through the device when it is powered down.