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CD4052B

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20-V, 4:1, 2-channel general-purpose multiplexer

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Data sheet

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TMUX4052 ACTIVE +/-12-V, 4:1, 2-channel multiplexer with 1.8-V logic compatible logic 24-V mux with 1.8-V logic and smaller package options

CD4052B

ACTIVE
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Product details

Configuration 4:1 Number of channels 2 Power supply voltage - single (V) 3.3, 5, 12, 16, 20 Power supply voltage - dual (V) +/-10, +/-2.5, +/-5 Protocols Analog Ron (typ) (Ω) 125 CON (typ) (pF) 18 ON-state leakage current (max) (µA) 0.3 Supply current (typ) (µA) 0.04 Bandwidth (MHz) 25 Operating temperature range (°C) -55 to 125 Features Break-before-make Input/output continuous current (max) (mA) 10 Rating Catalog Drain supply voltage (max) (V) 20 Supply voltage (max) (V) 20 Negative rail supply voltage (max) (V) 0
Configuration 4:1 Number of channels 2 Power supply voltage - single (V) 3.3, 5, 12, 16, 20 Power supply voltage - dual (V) +/-10, +/-2.5, +/-5 Protocols Analog Ron (typ) (Ω) 125 CON (typ) (pF) 18 ON-state leakage current (max) (µA) 0.3 Supply current (typ) (µA) 0.04 Bandwidth (MHz) 25 Operating temperature range (°C) -55 to 125 Features Break-before-make Input/output continuous current (max) (mA) 10 Rating Catalog Drain supply voltage (max) (V) 20 Supply voltage (max) (V) 20 Negative rail supply voltage (max) (V) 0
PDIP (N) 16 181.42 mm² 19.3 x 9.4 SOIC (D) 16 59.4 mm² 9.9 x 6 SOP (NS) 16 79.56 mm² 10.2 x 7.8 TSSOP (PW) 16 32 mm² 5 x 6.4
  • Wide range of digital and analog signal levels:
    • Digital: 3 V to 20 V
    • Analog: ≤ 20 V P-P
  • Low ON resistance, 125 Ω (typical) over 15 V P-P signal input range for V DD – V EE = 18 V
  • High OFF resistance, channel leakage of ±100 pA (typical) at V DD – V EE = 18 V
  • Logic-level conversion for digital addressing signals of 3 V to 20 V (V DD – V SS = 3 V to 20 V) to switch analog signals to 20 V P-P (V DD – V EE = 20 V) matched switch characteristics, r ON = 5 Ω (typical) for V DD – V EE = 15 V very low quiescent power dissipation under all digital-control input and supply conditions, 0.2 µW (typical) at V DD – V SS = V DD – V EE = 10 V
  • Binary address decoding on chip
  • 5 V, 10 V, and 15 V parametric ratings
  • 100% tested for quiescent current at 20 V
  • Maximum input current of 1 µA at 18 V over full package temperature range, 100 nA at 18 V and 25°C
  • Break-before-make switching eliminates channel overlap
  • Wide range of digital and analog signal levels:
    • Digital: 3 V to 20 V
    • Analog: ≤ 20 V P-P
  • Low ON resistance, 125 Ω (typical) over 15 V P-P signal input range for V DD – V EE = 18 V
  • High OFF resistance, channel leakage of ±100 pA (typical) at V DD – V EE = 18 V
  • Logic-level conversion for digital addressing signals of 3 V to 20 V (V DD – V SS = 3 V to 20 V) to switch analog signals to 20 V P-P (V DD – V EE = 20 V) matched switch characteristics, r ON = 5 Ω (typical) for V DD – V EE = 15 V very low quiescent power dissipation under all digital-control input and supply conditions, 0.2 µW (typical) at V DD – V SS = V DD – V EE = 10 V
  • Binary address decoding on chip
  • 5 V, 10 V, and 15 V parametric ratings
  • 100% tested for quiescent current at 20 V
  • Maximum input current of 1 µA at 18 V over full package temperature range, 100 nA at 18 V and 25°C
  • Break-before-make switching eliminates channel overlap

The CD405xB analog multiplexers and demultiplexers are digitally-controlled analog switches having low ON impedance and very low OFF leakage current. These multiplexer circuits dissipate extremely low quiescent power over the full V DD – V SS and V DD – V EE supply-voltage ranges, independent of the logic state of the control signals.

The CD405xB analog multiplexers and demultiplexers are digitally-controlled analog switches having low ON impedance and very low OFF leakage current. These multiplexer circuits dissipate extremely low quiescent power over the full V DD – V SS and V DD – V EE supply-voltage ranges, independent of the logic state of the control signals.
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Technical documentation

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Type Title Date
* Data sheet CD405xB CMOS Single 8-Channel Analog Multiplexer or DemultiplexerWith Logic-Level Conversion datasheet (Rev. L) PDF | HTML 05 Sep 2023
Application note Selecting the Correct Texas Instruments Signal Switch (Rev. E) PDF | HTML 02 Jun 2022
Application note Multiplexers and Signal Switches Glossary (Rev. B) PDF | HTML 01 Dec 2021
Application note CBT-C, CB3T, and CB3Q Signal-Switch Families (Rev. C) PDF | HTML 19 Nov 2021
Selection guide Logic Guide (Rev. AB) 12 Jun 2017
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 02 Dec 2015
User guide LOGIC Pocket Data Book (Rev. B) 16 Jan 2007
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 08 Jul 2004
User guide Signal Switch Data Book (Rev. A) 14 Nov 2003
Application note Understanding Buffered and Unbuffered CD4xxxB Series Device Characteristics 03 Dec 2001

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Interface adapter

LEADED-ADAPTER1 — Surface mount to DIP header adapter for quick testing of TI's 5, 8, 10, 16 & 24-pin leaded packages

The EVM-LEADED1 board allows for quick testing and bread boarding of TI's common leaded packages.  The board has footprints to convert TI's D, DBQ, DCT,DCU, DDF, DGS, DGV, and PW surface mount packages to 100mil DIP headers.     

User guide: PDF
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Package Pins CAD symbols, footprints & 3D models
PDIP (N) 16 Ultra Librarian
SOIC (D) 16 Ultra Librarian
SOP (NS) 16 Ultra Librarian
TSSOP (PW) 16 Ultra Librarian
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