SLVSHK7 March   2025 TPS65214

ADVANCE INFORMATION  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 BUCK1 Converter
    6. 5.6 BUCK2, BUCK3 Converter
    7. 5.7 General Purpose LDOs (LDO1, LDO2)
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1  Power-Up Sequencing
      2. 6.3.2  Power-Down Sequencing
      3. 6.3.3  Push Button and Enable Input (EN/PB/VSENSE)
      4. 6.3.4  OFF-Request by I2C Command
      5. 6.3.5  First Supply Detection (FSD)
      6. 6.3.6  Input Voltage Slew Rate With Automatic Power-up
      7. 6.3.7  Buck Converters (Buck1, Buck2, and Buck3)
      8. 6.3.8  Linear Regulators (LDO1 and LDO2)
      9. 6.3.9  Reset to SoC (nRSTOUT)
      10. 6.3.10 Interrupt Pin (nINT)
      11. 6.3.11 PWM/PFM and Low Power Modes (MODE/STBY)
      12. 6.3.12 General Purpose Input/Output and Voltage Select Pin (GPIO/VSEL)
      13. 6.3.13 General Purpose Output and nWAKEUP (GPO/nWAKEUP)
      14. 6.3.14 RESET-Request by I2C Command
      15. 6.3.15 Register Access Control
      16. 6.3.16 I2C-Compatible Interface
        1. 6.3.16.1 Data Validity
        2. 6.3.16.2 Start and Stop Conditions
        3. 6.3.16.3 Transferring Data
    4. 6.4 Device Functional Modes
      1. 6.4.1 Modes of Operation
        1. 6.4.1.1 OFF State
        2. 6.4.1.2 INITIALIZE State
        3. 6.4.1.3 ACTIVE State
        4. 6.4.1.4 STBY State
        5. 6.4.1.5 SLEEP State
        6.       44
        7. 6.4.1.6 Fault Handling
    5. 6.5 User Registers
    6. 6.6 Device Registers
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Typical Application Example
      2. 7.2.2 Design Requirements
      3. 7.2.3 Detailed Design Procedure
        1. 7.2.3.1 Buck1, Buck2, Buck3 Design Procedure
        2. 7.2.3.2 LDO1, LDO2 Design Procedure
        3. 7.2.3.3 VSYS, VDD1P8
        4. 7.2.3.4 Digital Signals Design Procedure
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 Receiving Notification of Documentation Updates
    4. 8.4 Support Resources
    5. 8.5 Trademarks
    6. 8.6 Electrostatic Discharge Caution
    7. 8.7 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information
    1. 10.1 Package Option Addendum
    2. 10.2 Tape and Reel Information

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • VAF|24
Thermal pad, mechanical data (Package|Pins)
Data Sheet

TPS65214 Power Management IC with 3 BUCKs and 2 LDOs for Industrial Applications