SLVSDA7E
February 2017 – August 2019
TPS61178
PRODUCTION DATA.
1
Features
2
Applications
3
Description
Device Images
Typical Application
4
Revision History
5
Device Comparison Table
6
Pin Configuration and Functions
Pin Functions
7
Specifications
7.1
Absolute Maximum Ratings
7.2
ESD Ratings
7.3
Recommended Operating Conditions
7.4
Thermal Information
7.5
Electrical Characteristics
7.6
Timing Requirements
7.7
Switching Characteristics
7.8
Typical Characteristics
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Under-voltage Lockout
8.3.2
Enable and Disable
8.3.3
Startup
8.3.4
Load Disconnect Gate Driver
8.3.5
Adjustable Peak Current Limit
8.3.6
Output Short Protection (with load disconnected FET)
8.3.7
Adjustable Switching Frequency
8.3.8
External Clock Synchronization (TPS611781)
8.3.9
Error Amplifier
8.3.10
Slope Compensation
8.3.11
Start-up with the Output Pre-Biased
8.3.12
Bootstrap Voltage (BST)
8.3.13
Over-voltage Protection
8.3.14
Thermal Shutdown
8.4
Device Functional Modes
8.4.1
Operation
8.4.2
Auto PFM Mode (TPS61178)
8.4.3
Forced PWM Mode (TPS611781)
9
Application and Implementation
9.1
Application Information
9.2
Typical Application
9.2.1
Design Requirements
9.2.2
Detailed Design Procedure
9.2.2.1
Custom Design With WEBENCH® Tools
9.2.2.2
Setting the Switching Frequency
9.2.3
Setting the Current Limit
9.2.4
Setting the Output Voltage
9.2.4.1
Selecting the Inductor
9.2.4.2
Selecting the Output Capacitors
9.2.4.3
Selecting the Input Capacitors
9.2.4.4
Loop Stability and Compensation
9.2.4.4.1
Small Signal Model
9.2.4.4.2
Loop Compensation Design Steps
9.2.4.4.3
Selecting the Disconnect FET
9.2.4.4.4
Selecting the Bootstrap Capacitor
9.2.4.4.5
VCC Capacitor
9.2.5
TPS61178 Application Waveform
9.3
System Examples
9.3.1
TPS61178 with 14-V Output from 2.7-V to 4.4-V Input Voltage
9.3.2
TPS61178 Without Load Disconnect Function
9.3.3
TPS611781 External Clock Synchronization
10
Power Supply Recommendations
11
Layout
11.1
Layout Guidelines
11.2
Layout Example
12
Device and Documentation Support
12.1
Device Support
12.1.1
Third-Party Products Disclaimer
12.1.2
Development Support
12.1.2.1
Custom Design With WEBENCH® Tools
12.2
Documentation Support
12.2.1
Related Documentation
12.3
Related Links
12.4
Receiving Notification of Documentation Updates
12.5
Community Resources
12.6
Trademarks
12.7
Electrostatic Discharge Caution
12.8
Glossary
13
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
RNW|13
MPDS580B
Thermal pad, mechanical data (Package|Pins)
Orderable Information
slvsda7e_oa
slvsda7e_pm
1
Features
Input Voltage Range: 2.7 V to 20 V
Output Voltage Range: 4.5 V to 20 V
Programmable Switch Peak Current: up to 10 A
Two 16-mΩ FETs Integrated
Efficiency up to 96%: V
IN
= 7.2 V, V
OUT
= 16 V, I
OUT
= 2 A
Adjustable Switching Frequency: up to 2.2 MHz
External Clock Synchronization:
200 kHz to 2.2 MHz
Gate Driver for Load Disconnect
Hiccup Short Protection
Over Voltage Protection
Auto PFM Operation - TPS61178
Forced PWM Mode - TPS611781
3.0-mm x 3.5-mm 13-pin VQFN Hotrod Package
Create a Custom Design Using the TPS61178 With the
WEBENCH® Power Designer