3 Description
The TPS40322 device is a dual-output, synchronous buck controller. It can also be configured as a single-output, two-phase controller. The 180° out-of-phase operation reduces the input current ripple and extends the input capacitor lifetime. Bidirectional master and slave synchronization function provides evenly distributed phase shift for a four-output system that reduces input ripple further and attenuates the system noise.
The wide input range can support 3.3-V, 5-V, and
12-V buses. The accurate reference voltage satisfies the precision voltage needed by ASICs and potentially reduces the output capacitance requirement. Separate PGOOD signals provide flexibility for system monitoring and sequencing. The two channels are independently controlled and each soft-start time is programmable. Voltage mode control is implemented to reduce noise sensitivity and also ensures low duty ratio conversion.
Device Information(1)
PART NUMBER |
PACKAGE |
BODY SIZE (NOM) |
TPS40322 |
VQFN (32) |
5.00 mm × 5.00 mm |
- For all available packages, see the orderable addendum at the end of the data sheet.
4 Revision History
Changes from D Revision (December 2013) to E Revision
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Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section Go
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Updated the thermal data to new values Go
Changes from C Revision (JANUARY 2013) to D Revision
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Added information regarding the appropriate output voltage range when using the remote sense amplifier in the Two-Phase Mode, Remote Sense Amplifier, and Current Sharing Loop sectionGo
Changes from B Revision (JUNE 2012) to C Revision
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Added clarity to ABSOLUTE MAXIMUM RATINGS tableGo
Changes from A Revision (JANUARY 2012) to B Revision
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Changed all references of "multi-phase" to "two-phase" throughout documentGo
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Added clarity to SIMPLIFIED APPLICATION CIRCUIT.Go
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Added "When not being used, SYNC must be left floating" to SYNC description in PIN FUNCTIONS table.Go
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Added clarity to Functional Block DiagramGo
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Added clarity to Figure 15Go
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Added clarity to Figure 16Go
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Added clarity to Figure 17Go
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Added clarity to Figure 18Go
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Added clarity to Figure 19Go
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Changed "This design limits the maximum voltage drop across the current sense inputs, VCS(max), to 60 mV." to "This design limits the maximum voltage drop across the current sense inputs, VCS(max), to 50 mV." in ILIM Resistor (R2) section.Go
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Changed Equation 23Go
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Changed Output current = 10 (max) to Output current = 30 (max) in Table 7 Go
Changes from * Revision (JUNE 2011) to A Revision
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Added clarity to Functional Block DiagramGo
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Added clarity to Figure 18Go