SLVSA00E September   2009  – April 2015 TLV700

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Internal Current Limit
      2. 7.3.2 Shutdown
      3. 7.3.3 Dropout Voltage
      4. 7.3.4 Undervoltage Lockout (UVLO)
    4. 7.4 Device Functional Modes
      1. 7.4.1 Normal Operation
      2. 7.4.2 Dropout Operation
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Input and Output Capacitor Requirements
        2. 8.2.2.2 Transient Response
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Examples
    3. 10.3 Thermal Protection
    4. 10.4 Power Dissipation
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
        1. 11.1.1.1 Evaluation Modules
        2. 11.1.1.2 Spice Models
      2. 11.1.2 Device Nomenclature
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

1 Features

  • Very Low Dropout:
    • 43 mV at IOUT = 50 mA, VOUT = 2.8 V
    • 85 mV at IOUT = 100 mA, VOUT = 2.8 V
    • 175 mV at IOUT = 200 mA, VOUT = 2.35 V
  • 2% Accuracy
  • Low IQ: 31 μA
  • Available in Fixed-Output Voltages from 1.2 V to 4.8 V
  • High PSRR: 68 dB at 1 kHz
  • Stable With Effective Capacitance of 0.1 μF(1)
  • Thermal Shutdown and Overcurrent Protection
  • Available in 1.5-mm × 1.5-mm SON-6, SOT23-5, and SC-70 Packages
    (1)

2 Applications

  • Wireless Handsets
  • Smart Phones, PDAs
  • ZigBee® Networks
  • Bluetooth® Devices
  • Li-Ion Operated Handheld Products
  • WLAN and Other PC Add-on Cards

3 Description

The TLV700 series of low-dropout (LDO) linear regulators are low quiescent current devices with excellent line and load transient performance. These LDOs are designed for power-sensitive applications. A precision bandgap and error amplifier provides overall 2% accuracy. Low output noise, very high power-supply rejection ratio (PSRR), and low dropout voltage make this series of devices ideal for most battery-operated handheld equipment. All device versions have thermal shutdown and current limit for safety.

Furthermore, these devices are stable with an effective output capacitance of only 0.1 μF. This feature enables the use of cost-effective capacitors that have higher bias voltages and temperature derating. The devices regulate to specified accuracy with no output load.

The TLV700 series of LDOs are available in 1.5-mm × 1.5-mm SON-6, SOT-5, and SC70 packages.

Device Information(1)

PART NUMBER PACKAGE BODY SIZE (NOM)
TL700xx SC70 (5) 2.00 mm × 1.25 mm
SOT (5) 2.90 mm × 1.60 mm
WSON (6) 1.50 mm × 1.50 mm
  1. For all available packages, see the orderable addendum at the end of the data sheet.

Typical Application Circuit

TLV700 fp_tac_lvsa00.gif