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THS4532 Ultra Low Power, Rail-to-Rail Output, Fully-Differential Amplifier
SLOS829A
February 2013 – July 2015
THS4532
PRODUCTION DATA.
CONTENTS
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THS4532 Ultra Low Power, Rail-to-Rail Output, Fully-Differential Amplifier
1
Features
2
Applications
3
Description
4
Revision History
5
Related Products
6
Pin Configuration and Functions
7
Specifications
7.1
Absolute Maximum Ratings
7.2
ESD Ratings
7.3
Recommended Operating Conditions
7.4
Thermal Information
7.5
Electrical Characteristics: VS = 2.7 V
7.6
Electrical Characteristics: VS = 5 V
7.7
Typical Characteristics
7.7.1
Typical Characteristics: VS = 2.7 V
7.7.2
Typical Characteristics: VS = 5 V
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Input Common-Mode Voltage Range
8.3.1.1
Setting the Output Common-Mode Voltage
8.3.2
Power Down
8.4
Device Functional Modes
9
Application and Implementation
9.1
Application Information
9.1.1
Frequency Response and Output Impedance
9.1.2
Distortion
9.1.3
Slew Rate, Transient Response, Settling Time, Overdrive, Output Voltage, and Turnon and Turnoff Time
9.1.4
Common-Mode and Power Supply Rejection
9.1.5
VOCM Input
9.1.6
Balance Error
9.1.7
Single-Supply Operation
9.1.8
Low-Power Applications and the Effects of Resistor Values on Bandwidth
9.1.9
Driving Capacitive Loads
9.1.10
Audio Performance
9.1.11
Audio On and Off Pop Performance
9.2
Typical Applications
9.2.1
SAR ADC Performance: THS5432 and ADS8321 Combined Performance
9.2.1.1
Design Requirements
9.2.1.2
Detailed Design Procedure
9.2.1.3
Application Curve
9.2.2
Audio ADC Driver Performance: THS5432 and PCM4204 Combined Performance
9.2.2.1
Design Requirements
9.2.2.2
Detailed Design Procedure
9.2.2.3
Application Curves
9.2.3
SAR ADC Performance: THS5432 and ADS7945 Combined Performance
9.2.3.1
Design Requirements
9.2.3.2
Detailed Design Procedure
9.2.3.3
Application Curve
9.3
Systems Examples
9.3.1
Differential-Input to Differential-Output Amplifier
9.3.1.1
AC-Coupled, Differential-Input to Differential-Output Design Issues
9.3.2
Single-Ended to Differential FDA Configuration
9.3.2.1
Input Impedance
9.3.3
Single-Ended Input to Differential Output Amplifier
9.3.3.1
AC-Coupled Signal Path Considerations for Single-Ended Input to Differential Output Conversion
9.3.3.2
DC-Coupled Input Signal Path Considerations for Single-Ended to Differential Conversion
9.3.3.3
Resistor Design Equations for the Single-Ended to Differential Configuration of the FDA
9.3.4
Differential Input to Single-Ended Output Amplifier
10
Power Supply Recommendations
11
Layout
11.1
Layout Guidelines
11.2
Layout Example
12
Device and Documentation Support
12.1
Documentation Support
12.2
Community Resources
12.3
Trademarks
12.4
Electrostatic Discharge Caution
12.5
Glossary
13
Mechanical, Packaging, and Orderable Information
IMPORTANT NOTICE
Package Options
Mechanical Data (Package|Pins)
PW|16
MPDS361A
Thermal pad, mechanical data (Package|Pins)
Orderable Information
slos829a_oa
slos829a_pm
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