SLLS552G December   2002  – September 2022 SN65HVD20 , SN65HVD21 , SN65HVD22 , SN65HVD23 , SN65HVD24

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Description (continued)
  6. 6 Device Comparison
  7. 7 Pin Configuration and Functions
  8. 8 Specifications
    1. 8.1  Absolute Maximum Ratings
    2. 8.2  ESD Ratings
    3. 8.3  Recommended Operating Conditions
    4. 8.4  Thermal Information
    5. 8.5  Driver Electrical Characteristics
    6. 8.6  Receiver Electrical Characteristics
    7. 8.7  Driver Switching Characteristics
    8. 8.8  Receiver Switching Characteristics
    9. 8.9  Receiver Equalization Characteristics
    10. 8.10 Power Dissipation
    11. 8.11 Typical Characteristics
  9. 9 Parameter Measurement Information
  10. 10Detailed Description
    1. 10.1 Overview
    2. 10.2 Functional Block Diagram
    3. 10.3 Feature Description
    4. 10.4 Device Functional Modes
      1. 10.4.1 Test Mode Driver Disable
      2. 10.4.2 Equivalent Input and Output Schematic Diagrams
  11. 11Application and Implementation
    1. 11.1 Application Information
    2. 11.2 Typical Application
      1. 11.2.1 Design Requirements
      2. 11.2.2 Detailed Design Procedure
        1. 11.2.2.1 Noise Considerations for Equalized Receivers
      3. 11.2.3 Application Curves
  12. 12Power Supply Recommendations
  13. 13Layout
    1. 13.1 Layout Guidelines
    2. 13.2 Layout Example
  14. 14Device and Documentation Support
    1. 14.1 Receiving Notification of Documentation Updates
    2. 14.2 Support Resources
    3. 14.3 Trademarks
    4. 14.4 Electrostatic Discharge Caution
    5. 14.5 Glossary
  15. 15Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

1 Features

  • Common-mode voltage range (–20 V to 25 V) more than doubles TIA/EIA-485 requirement
  • Receiver equalization extends cable length, signaling rate (SN65HVD2[3,4])
  • Reduced unit-load for up to 256 nodes
  • Bus I/O protection to over 16-kV HBM
  • Failsafe receiver for open-circuit, short-circuit, and idle-bus conditions
  • Low standby supply current 1 µA (maximum)
  • More than 100 mV receiver hysteresis