SLES177B April   2006  – August 2015 PCM1808

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Hardware Control
      2. 7.3.2 System Clock
      3. 7.3.3 Synchronization With Digital Audio System
      4. 7.3.4 Power On
      5. 7.3.5 Serial Audio Data Interface
        1. 7.3.5.1 Interface Mode
          1. 7.3.5.1.1 Master Mode
          2. 7.3.5.1.2 Slave Mode
        2. 7.3.5.2 Data Format
        3. 7.3.5.3 Interface Timing
    4. 7.4 Device Functional Modes
      1. 7.4.1 Fade-In and Fade-Out Functions
      2. 7.4.2 Clock-Halt Power-Down and Reset Function
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Control Pins
        2. 8.2.2.2 Master Clock
        3. 8.2.2.3 DSP or Audio Processor
        4. 8.2.2.4 Input Filters
      3. 8.2.3 Application Curve
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 VCC, VDD Pins
      2. 10.1.2 AGND, DGND Pins
      3. 10.1.3 VINL, VINR Pins
      4. 10.1.4 VREF Pin
      5. 10.1.5 DOUT Pin
      6. 10.1.6 System Clock
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Community Resources
    2. 11.2 Trademarks
    3. 11.3 Electrostatic Discharge Caution
    4. 11.4 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

1 Features

  • 24-Bit Delta-Sigma Stereo A/D Converter (ADC)
  • Single-Ended Voltage Input: 3 Vp-p
  • High Performance:
    • THD+N: –93 dB (Typical)
    • SNR: 99 dB (Typical)
    • Dynamic Range: 99 dB (Typical)
  • Oversampling Decimation Filter:
    • Oversampling Frequency: ×64
    • Pass-Band Ripple: ±0.05 dB
    • Stop-Band Attenuation: –65 dB
    • On-Chip High-Pass Filter: 0.91 Hz (48 kHz)
  • Flexible PCM Audio Interface
    • Master- or Slave-Mode Selectable
    • Data Formats: 24-Bit I2S, 24-Bit Left-Justified
  • Power Down and Reset by Halting System Clock
  • Analog Antialias LPF Included
  • Sampling Rate: 8 kHz–96 kHz
  • System Clock: 256 fS, 384 fS, 512 fS
  • Resolution: 24 Bits
  • Dual Power Supplies:
    • 5-V for Analog
    • 3.3-V for Digital
  • Package: 14-Pin TSSOP

2 Applications

  • DVD Recorder
  • Digital TV
  • AV Amplifier or Receiver
  • MD Player
  • CD Recorder
  • Multitrack Receiver
  • Electric Musical Instrument

3 Description

The PCM1808 device is a high-performance, low-cost, single-chip, stereo analog-to-digital converter with single-ended analog voltage input. The PCM1808 device uses a delta-sigma modulator with 64-times oversampling and includes a digital decimation filter and high-pass filter that removes the dc component of the input signal. For various applications, the PCM1808 device supports master and slave mode and two data formats in serial audio interface.

The PCM1808 device supports the power-down and reset functions by means of halting the system clock.

The PCM1808 device is suitable for wide variety of cost-sensitive consumer applications requiring good performance and operation with a 5-V analog supply and 3.3-V digital supply. Fabrication of the PCM1808 device uses a highly advanced CMOS process. The device is available in a small, 14-pin TSSOP package.

Device Information(1)

PART NUMBER PACKAGE BODY SIZE (NOM)
PCM1808 TSSOP (14) 4.40 mm × 5.00 mm
  1. For all available packages, see the orderable addendum at the end of the datasheet.

PCM1808 Block Diagram

PCM1808 bd_front_page_sles177.gif