SBOS701D
December 2015 – August 2021
OPA191
,
OPA2191
,
OPA4191
PRODUCTION DATA
1
Features
2
Applications
3
Description
4
Revision History
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information: OPA191
6.5
Thermal Information: OPA2191
6.6
Thermal Information: OPA4191
6.7
Electrical Characteristics: VS = ±4 V to ±18 V (VS = 8 V to 36 V)
6.8
Electrical Characteristics: VS = ±2.25 V to ±4 V (VS = 4.5 V to 8 V)
6.9
Typical Characteristics
7
Parameter Measurement Information
7.1
Input Offset Voltage Drift
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Input Protection Circuitry
8.3.2
EMI Rejection
8.3.3
Phase Reversal Protection
8.3.4
Thermal Protection
8.3.5
Capacitive Load and Stability
8.3.6
Common-Mode Voltage Range
8.3.7
Electrical Overstress
8.3.8
Overload Recovery
8.4
Device Functional Modes
9
Application and Implementation
9.1
Application Information
9.2
Typical Applications
9.2.1
Low-side Current Measurement
9.2.1.1
Design Requirements
9.2.1.2
Detailed Design Procedure
9.2.1.3
Application Curves
9.2.2
16-Bit Precision Multiplexed Data-Acquisition System
9.2.2.1
Design Requirements
9.2.2.2
Detailed Design Procedure
9.2.3
Slew Rate Limit for Input Protection
10
Power Supply Recommendations
11
Layout
11.1
Layout Guidelines
11.2
Layout Example
12
Device and Documentation Support
12.1
Device Support
12.1.1
Development Support
12.1.1.1
TINA-TI™ SImulation Software (Free Download)
12.1.1.2
TI Precision Designs
12.2
Documentation Support
12.2.1
Related Documentation
12.3
Receiving Notification of Documentation Updates
12.4
Support Resources
12.5
Trademarks
12.6
Electrostatic Discharge Caution
12.7
Glossary
13
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
D|8
MSOI002K
DGK|8
MPDS028E
DBV|5
MPDS018T
Thermal pad, mechanical data (Package|Pins)
Orderable Information
sbos701d_oa
sbos701d_pm
1
Features
Low offset voltage: ±5 µV
Low offset voltage drift: ±0.1 µV/°C
Low noise: 15 nV/√
Hz
at 1 kHz
High common-mode rejection: 140 dB
Low bias current: ±5 pA
Rail-to-rail input and output
Wide bandwidth: 2.5-MHz GBW
High slew rate: 5 V/µs
Low quiescent current: 140 µA per amplifier
Wide supply: ±2.25 V to ±18 V, 4.5 V to 36 V
EMI/RFI filtered inputs
Differential input voltage range to supply rail
High capacitive load drive capability: 1 nF
Industry standard packages:
Single in SOIC-8, SOT-5, and VSSOP-8
Dual in SOIC-8 and VSSOP-8
Quad in SOIC-14, TSSOP-14, and WQFN-16