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LP8758-EA Four 4-A Output Synchronous Step-Down DCDC Converters
SNVSC24
April 2021
LP8758-EA
PRODUCTION DATA
CONTENTS
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LP8758-EA Four 4-A Output Synchronous Step-Down DCDC Converters
1
Features
2
Applications
3
Description
4
Revision History
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
I2C Serial Bus Timing Requirements
6.7
Switching Characteristics
6.8
Typical Characteristics
7
Detailed Description
7.1
Overview
7.1.1
Buck Information
7.1.1.1
Operating Modes
7.1.1.2
Programmability
7.1.1.3
Features
7.2
Functional Block Diagram
7.3
Feature Description
7.3.1
Overview
7.3.1.1
Transition Between PWM and PFM Modes
7.3.1.2
Buck Converter Load Current Measurement
7.3.1.3
Spread-Spectrum Mode
7.3.2
Power-Up
7.3.3
Regulator Control
7.3.3.1
Enabling and Disabling
7.3.3.2
Changing Output Voltage
7.3.4
Device Reset Scenarios
7.3.5
Diagnosis and Protection Features
7.3.5.1
Warnings for Diagnosis (Interrupt)
7.3.5.1.1
Output Current Limit
7.3.5.1.2
Thermal Warning
7.3.5.2
Protection (Regulator Disable)
7.3.5.2.1
Short-Circuit and Overload Protection
7.3.5.2.2
Thermal Shutdown
7.3.5.3
Fault (Power Down)
7.3.5.3.1
Undervoltage Lockout
7.3.6
Digital Signal Filtering
7.4
Device Functional Modes
7.4.1
Modes of Operation
7.5
Programming
7.5.1
I2C-Compatible Interface
7.5.1.1
Data Validity
7.5.1.2
Start and Stop Conditions
7.5.1.3
Transferring Data
7.5.1.4
I2C-Compatible Chip Address
7.5.1.5
Auto Increment Feature
7.6
Register Maps
7.6.1
Register Descriptions
7.6.1.1
OTP_REV
7.6.1.2
BUCK0_CTRL1
7.6.1.3
BUCK0_CTRL2
7.6.1.4
BUCK1_CTRL1
7.6.1.5
BUCK1_CTRL2
7.6.1.6
BUCK2_CTRL1
7.6.1.7
BUCK2_CTRL2
7.6.1.8
BUCK3_CTRL1
7.6.1.9
BUCK3_CTRL2
7.6.1.10
BUCK0_VOUT
7.6.1.11
BUCK0_FLOOR_VOUT
7.6.1.12
BUCK1_VOUT
7.6.1.13
BUCK1_FLOOR_VOUT
7.6.1.14
BUCK2_VOUT
7.6.1.15
BUCK2_FLOOR_VOUT
7.6.1.16
BUCK3_VOUT
7.6.1.17
BUCK3_FLOOR_VOUT
7.6.1.18
BUCK0_DELAY
7.6.1.19
BUCK1_DELAY
7.6.1.20
BUCK2_DELAY
7.6.1.21
BUCK3_DELAY
7.6.1.22
RESET
7.6.1.23
CONFIG
7.6.1.24
INT_TOP
7.6.1.25
INT_BUCK_0_1
7.6.1.26
INT_BUCK_2_3
7.6.1.27
TOP_STAT
7.6.1.28
BUCK_0_1_STAT
7.6.1.29
BUCK_2_3_STAT
7.6.1.30
TOP_MASK
7.6.1.31
BUCK_0_1_MASK
7.6.1.32
BUCK_2_3_MASK
7.6.1.33
SEL_I_LOAD
7.6.1.34
I_LOAD_2
7.6.1.35
I_LOAD_1
8
Application and Implementation
8.1
Application Information
8.2
Typical Application
8.2.1
Design Requirements
8.2.2
Detailed Design Procedure
8.2.2.1
Application Components
8.2.2.1.1
Inductor Selection
8.2.2.1.2
Input Capacitor Selection
8.2.2.1.3
Output Capacitor Selection
8.2.3
Application Curves
9
Power Supply Recommendations
10
Layout
10.1
Layout Guidelines
10.2
Layout Example
11
Device and Documentation Support
11.1
Device Support
11.2
Documentation Support
11.2.1
Related Documentation
11.3
Receiving Notification of Documentation Updates
11.4
Support Resources
11.5
Trademarks
11.6
Electrostatic Discharge Caution
11.7
Glossary
12
Mechanical, Packaging, and Orderable Information
IMPORTANT NOTICE
Package Options
Mechanical Data (Package|Pins)
YFF|35
MXBG315
Thermal pad, mechanical data (Package|Pins)
Orderable Information
snvsc24_oa
snvsc24_pm
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