SNAS829A October   2021  – January 2022 LMK1D2106 , LMK1D2108

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Fail-Safe Input
    4. 8.4 Device Functional Modes
      1. 8.4.1 LVDS Output Termination
      2. 8.4.2 Input Termination
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Examples
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Support Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

1 Features

  • High-performance LVDS clock buffer family: up to 2 GHz
    • Dual 1:6 differential buffer
    • Dual 1:8 differential buffer
  • Supply voltage: 1.71 V to 3.465 V
  • Low additive jitter: < 60 fs RMS maximum in 12-kHz to
    20-MHz at 156.25 MHz
    • Very low phase noise floor: -164 dBc/Hz (typical)
  • Very low propagation delay: < 575 ps maximum
  • Output skew: 20 ps maximum
  • High-swing LVDS (boosted mode): 500-mV VOD typical when AMP_SEL = 1
  • Bank enable/disable using the EN pin
  • Fail-safe input operation
  • Universal inputs accept LVDS, LVPECL, LVCMOS, HCSL and CML signal levels
  • LVDS reference voltage, VAC_REF, available for capacitive-coupled inputs
  • Industrial temperature range: –40°C to 105°C
  • Packaged in

    • LMK1D2106: 6-mm × 6-mm, 40-pin VQFN (RHA)

    • LMK1D2108: 7-mm × 7-mm, 48-pin VQFN (RGZ)