SLVUC05A
November 2020 – July 2022
TPS25750
Read This First
About This Manual
Notational Conventions
Glossary
Related Documents
Support Resources
Trademarks
1
Introduction
1.1
Introduction
1.1.1
Purpose and Scope
1.2
PD Controller Host Interface Description
1.2.1
Overview
1.2.2
Register and Field Notation
1.3
Unique Address Interface
1.3.1
Unique Address Interface Protocol
1.3.2
Unique Address Interface Registers
2
Unique Address Interface Register Detailed Descriptions
2.1
0x03 MODE Register
2.2
0x0D DEVICE_CAPABILITIES Register
2.3
0x14 - 0x19 INT_EVENT, INT_MASK, INT_CLEAR Registers
2.4
0x1A STATUS Register
2.5
0x26 POWER_PATH_STATUS Register
2.6
0x29 PORT_CONTROL Register
2.7
0x2D BOOT_STATUS Register
2.8
0x30 RX_SOURCE_CAPS Register
2.9
0x31 RX_SINK_CAPS Register
2.10
0x32 TX_SOURCE_CAPS Register
2.11
0x33 TX_SINK_CAPS Register
2.12
0x34 ACTIVE_CONTRACT_PDO Register
2.13
0x35 ACTIVE_CONTRACT_RDO Register
2.14
0x3F POWER_STATUS Register
2.15
0x40 PD_STATUS Register
2.16
GPIO Events
2.17
0x69 TYPEC_STATE Register
2.18
0x70 SLEEP_CONFIG Register
2.19
0x72 GPIO_STATUS Register
3
4CC Task Detailed Descriptions
3.1
Overview
3.2
PD Message Tasks
3.2.1
'SWSk' - PD PR_Swap to Sink
3.2.2
'SWSr' - PD PR_Swap to Source
3.2.3
'SWDF' - PD DR_Swap to DFP
3.2.4
'SWUF' - PD DR_Swap to UFP
3.2.5
'GSkC' - PD Get Sink Capabilities
3.2.6
'GSrC' - PD Get Source Capabilities
3.2.7
'SSrC' - PD Send Source Capabilities
3.3
Patch Bundle Update Tasks
3.3.1
'PBMs' - Start Patch Burst Mode Download Sequence
3.3.2
'PBMc' - Patch Burst Mode Download Complete
3.3.3
'PBMe' - End Patch Burst Mode Download Sequence
3.3.4
Patch Burst Mode Example
3.3.5
'GO2P' - Go to Patch Mode
3.4
System Tasks
3.4.1
'DBfg' - Clear Dead Battery Flag
3.4.2
'I2Cr' - I2C Read Transaction
3.4.3
'I2Cw' - I2C Write Transaction
4
User Reference
4.1
PD Controller Application Customization
4.2
Loading a Patch Bundle
5
Revision History
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