SCPS178C
July 2007 – April 2022
PCA9306-Q1
PRODUCTION DATA
1
Features
2
Applications
3
Description
4
Revision History
5
Description (continued)
6
Pin Configuration and Functions
7
Specifications
7.1
Absolute Maximum Ratings
7.2
ESD Ratings
7.3
Recommended Operating Conditions
7.4
Thermal Information
7.5
Electrical Characteristics
7.6
Switching Characteristics: Translating Down, VIH = 3.3 V
7.7
Switching Characteristics: Translating Down, VIH = 2.5 V
7.8
Switching Characteristics: Translating Up, VIH = 2.3 V
7.9
Switching Characteristics: Translating Up, VIH = 1.5 V
7.10
Typical Characteristics
8
Parameter Measurement Information
9
Detailed Description
9.1
Overview
9.1.1
Definition of threshold voltage
9.1.2
Correct Device Set Up
9.1.3
Disconnecting a Target from the Main I2C Bus Using the EN Pin
9.1.4
Supporting Remote Board Insertion to Backplane with PCA9306-Q1
9.1.5
Switch Configuration
9.1.6
Controller on Side 1 or Side 2 of Device
9.1.7
LDO and PCA9306-Q1 Concerns
9.1.8
Current Limiting Resistance on VREF2
9.2
Functional Block Diagram
9.3
Feature Description
9.3.1
Enable (EN) Pin
9.3.2
Voltage Translation
9.4
Device Functional Modes
10
Application and Implementation
10.1
Application Information
10.1.1
General Applications of I2C
10.2
Typical Application
10.2.1
Design Requirements
10.2.2
Detailed Design Procedure
10.2.2.1
Bidirectional Translation
10.2.2.2
Sizing Pullup Resistor
10.2.2.3
PCA9306-Q1 Bandwidth
10.2.3
Application Curves
11
Power Supply Recommendations
12
Layout
12.1
Layout Guidelines
12.2
Layout Example
13
Device and Documentation Support
13.1
Documentation Support
13.1.1
Related Documentation
13.2
Receiving Notification of Documentation Updates
13.3
Support Resources
13.4
Trademarks
13.5
Electrostatic Discharge Caution
13.6
Glossary
14
Mechanical, Packaging, and Orderable Information
1
Features
AEC-Q100 qualified for automotive applications
Temperature grade 2: –40°C to 105°C, T
A
HBM ESD classification level H2
CDM ESD classification level C4B
2-Bit bidirectional translator for SDA and SCL lines in mixed-mode I
2
C applications
Compatible with I
2
C and SMBus
Less than 1.5-ns maximum propagation delay to accommodate standard-mode and fast-mode I
2
C devices and multiple controllers
Allows voltage-level translation between
1.2-V V
REF1
and 1.8-V, 2.5-V, 3.3-V, or 5-V V
REF2
1.8-V V
REF1
and 2.5-V, 3.3-V, or 5-V V
REF2
2.5-V V
REF1
and 3.3-V, or 5-V V
REF2
3.3-V V
REF1
and 5-V V
REF2
Provides bidirectional voltage translation with no direction pin
Low 3.5-Ω ON-state connection between input and output ports provides less signal distortion
Open-drain I
2
C I/O Ports (SCL1, SDA1, SCL2, and SDA2)
5-V tolerant I
2
C I/O ports to support mixed-mode signal operation
High-impedance SCL1, SDA1, SCL2, and SDA2 pins for EN = low
Lock-up-free operation for isolation when EN = Low
Flow-through pinout for ease of printed-circuit board trace routing
Latch-up performance exceeds 100 mA Per JESD 78, Class II
ESD protection exceeds JESD 22
2000-V Human-body model (A114-A)
200-V Machine model (A115-A)
1000-V Charged-device model (C101)