SBAU484 February   2025 AFE7728D , AFE7768D , AFE7769D

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2Hardware and Software Setup
    1. 2.1 Hardware Setup
    2. 2.2 Software Setup
    3. 2.3 Test Cases
      1. 2.3.1 Initial Bringup for All Test Cases
        1. 2.3.1.1 Test Case 1: Generate Sinusoidal tx_data From NCO @ 5MHz
        2. 2.3.1.2 Test case 2: Generate Sinusoidal tx_data From NCO @ 20MHz
        3. 2.3.1.3 Test Case 3: Connect Signal Generator Output Port to RX of the AFE7769DEVM (at output power, -13dBm)
        4. 2.3.1.4 Test Case 4: Connect Signal Generator Output Port to RX of the AFE7769DEVM (at output power, -23dBm)
User's Guide

Interfacing the TI AFE7769DEVM With the Altera Arria 10 FPGA