Design Description

This document describes how to design a circuit to directly monitor temperature using a thermistor with a successive approximation register (SAR) analog-to-digital (ADC). This temperature sensing circuit monitors a temperature range from –25°C to 100°C using a negative temperature coefficient (NTC) thermistor in series with a resistor to form a voltage-divider. This voltage divider has the effect of producing an output voltage that is inversely related to the monitored temperature. The source voltage to the resister divider is the analog power supply (AVDD) to the analog to digital converter, ADS7142, which, for this device, is also the reference. By connecting the resistor divider to the reference input, AVDD, the measurements will be ratiometric which will ensure that variations in the reference voltage will not impact the overall accuracy. The capacitor in parallel with the input resistor is used to support ADC input settling performance.

Thermistors are used to monitor temperature in applications such as appliances, wireless environmental sensors, and smoke and heat detectors. In these applications, the thermistor voltage changes slowly thus it is not necessary to sample at high sampling rates. This means that there is no need for a driving input amplifier to condition the input voltage. A similar circuit design, Driving SAR directly without a front-end buffer circuit, explains how to measure introduced drift from external components which can prove to be helpful in these applications.

Specifications

Design Notes

1. Create a resistor divider topology with NTC thermistor as the second component of the resister divider. Using this configuration will cause the ADC input voltage to decrease with an increase in temperature. The input voltage will increase as the temperature decreases or the input voltage will decrease as the temperature increases.
2. R1 in the resistor divider is designed based on the temperature range monitored. Use the thermistor resistance tolerance as a guideline for choosing the tolerance of R1. Typically, a 1% tolerance resistor is sufficient to match the thermistor tolerance, but a better performing resistor will be needed if stringent requirements are present. The equation used to calculate the value of R1 is provided in the following component section.
3. The capacitor in parallel, C1 with the NTC is implemented to help support ADC input settling within the acquisition phase of the ADC sampling rate. The capacitor affects the start-up time of the system as it will take longer to charge larger capacitors.

Component Selection

1. Select a thermistor to best fit the application requirements needed. When selecting the thermistor, take into consideration the Beta value (B), a common parameter found in the device data sheet. The B value is specified across a given temperature range and represents the change of the resistance of the thermistor across that specified temperature range. The NTC selected in this example is a 100 kΩ at 25°C with a B(25/85) value of 3977.
2. The expected extrema resistances the NTC will experience need to be calculated to select R1. The value of R1 will create a more linear voltage versus temperature relation. The following equation is used to find the NTC resistance based on temperature; calculations require temperature to be in Kelvin.
   

   where

   • R_NTC is the thermistor resistance (Ω) at temperature T
   • R_@298.15K is the thermistor resistance (Ω) measured at 25°C given in the data sheet
   • B is the thermistor B value from data sheet in Kelvin (K)
   • T is the temperature in Kelvin (K) that the thermistor is at (0°C + 273.15 = K).

   Temperature range in Kelvin:

   • T_min = –25°C + 273.15 = 248.15K
   • T_max = 100°C + 273.15 = 373.15K

   Thermistor resistance values:

   • R_min = R_@373.15K = 100kΩ ∙ e^{3977(1/373.15K - 1/248.15K)} = 6.849 kΩ
   • R_max=R_@248.15K = 100kΩ ∙ e^{3977(1/248.15K - 1/248.15K)} = 1,469.744 kΩ
3. Calculate the value of R1, using the expected minimum and maximum NTC resistances. The closest resister value is 100 kΩ.

   R₁ = √(R_@373.15K ∙ R _@248.15K) = √(6.849 kΩ ∙ 1,469.744 kΩ) = 100.333 kΩ

4. Select the capacitor value. Base the capacitor value on the sampling rate the ADC will operate at since the capacitor functionality is to support ADC input settling performance. In this case the target sample rate is 10 kHz, with the max conversion time 1.8 μs.

   Using the Analog Engineer Calculator can help design this value based on the operation of the system and values from the ADC data sheet. Within the calculator tool, select Data Converters > ADC Drive Without Amplifier, then select the Sampling Rate Given Rin and Cin tab. Use this tool to solve for C1 based on the calculated sampling rate achievable, Fsamp(max). Within this window, enter the ADC sample-and-hold capacitor, 15pF, the parallel equivalent of the resister divider at the worst-case settling scenario which is when the NTC is at the max resistive value, 93.627kΩ, the max conversion time, 1.8us, and the ADC resolution, 12. The initial Cfilt value entered should be 20 × the ADC sample-and-hold capacitor, in this case 15 pF ∙ 20 = 300 pF. Entering this value results in the maximum sample rate to be less the desired 10 kHz. From here, decrease Cfilt to a value that results in Fsamp(max) to be equal to or greater than 10 kHz. In this case, C1 resulted to a value of 100 pF.

   
5. Run transient simulations to verify NTC performance across temperature and input settling within the acquisition time to be within half an LSB.

Design Simulation Model

The following schematic of the first order model of ADS7142 was built using the steps explained in TI Precision Labs –ADS: Building the SAR ADC model in TINA SPICE. The ADC sampling rate is set at 10 kHz.

Temperature Transfer Characteristics

The linear NTC voltage range for the desired temperature range of –25°C to 100°C is within the ADC input range and uses 87% of the ADC full scale range. The following equation is used to solve for the temperature measurement based on the resistor divider measured by the ADC. This does not include system calibration or system tolerances.

where:

• T is the temperature in Kelvin (K) (°C + 273.15 = K)
• Vo is the resistor divider output voltage measured by the ADC
• B is the thermistor B value of the NTC in Kelvin (K), in this case 3977
• R_@298.15K is the thermistor resistance (Ω) at 25°C, in this case 100 kΩ
• V_AVDD is the reference voltage and source voltage to the divider, in this case, 3.3 V
• R₁ is 100 kΩ

Transient DC Input Start-Up and Settling

Expected start-up time varies by the NTC resistance state. The following graph displays the maximum resistance value the NTC will experience, as this is the worst-case scenario for ADC input settling. The Verror graph shows that the input settling error is less than half of an LSB, ±402 μV, at the end of each acquisition period. See TI Precision Labs: Drive ADC Input for an explanation of ADC settling.

Small Layout

The ADS7142 is a dual-channel I2C ADC in a small X2QFN package size of 1.5 mm × 2 mm. The following image is a system-level solution using the ADS7142 with two NTCs connected at each analog input, though each input can monitor different types of sensors.

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Design References

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Link to Key Simulation Files

https://www.ti.com/lit/zip/sbac283