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LP3991 300-mA LDO for Digital Applications
SNVS296J
December 2006 – June 2016
LP3991
PRODUCTION DATA.
CONTENTS
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LP3991 300-mA LDO for Digital Applications
1
Features
2
Applications
3
Description
4
Revision History
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Timing Requirements
6.7
Typical Characteristics
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.3.1
Post-Buck Regulator
7.3.2
Maximum Supply Voltage and Thermal Considerations
7.4
Device Functional Modes
7.4.1
Enable Control
8
Application and Implementation
8.1
Application Information
8.2
Typical Application
8.2.1
Design Requirements
8.2.2
Detailed Design Procedure
8.2.2.1
External Capacitors
8.2.2.2
Input Capacitor
8.2.2.3
Output Capacitor
8.2.2.4
No-Load Stability
8.2.2.5
Capacitor Characteristics
8.2.2.6
Power Dissipation
8.2.2.7
Estimating Junction Temperature
8.2.3
Application Curves
9
Power Supply Recommendations
10
Layout
10.1
Layout Guidelines
10.2
Layout Example
10.3
DSBGA Mounting
10.4
DSBGA Light Sensitivity
11
Device and Documentation Support
11.1
Documentation Support
11.1.1
Related Documentation
11.2
Receiving Notification of Documentation Updates
11.3
Community Resources
11.4
Trademarks
11.5
Electrostatic Discharge Caution
11.6
Glossary
12
Mechanical, Packaging, and Orderable Information
IMPORTANT NOTICE
パッケージ・オプション
メカニカル・データ（パッケージ｜ピン）
YZR|4
MXBG267
サーマルパッド・メカニカル・データ
発注情報
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