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ADS8555EVM-PDK Evaluation Module
SLAU298A
November 2009 – May 2021
CONTENTS
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ADS8555EVM-PDK Evaluation Module
Trademarks
1
ADS8555EVM-PDK Overview
1.1
ADS8555EVM-PDK Features
1.2
ADS8555EVM Features
2
EVM Analog Interface
2.1
ADC Supply, Input, Voltage Reference, and Digital Connections
2.2
ADC Amplifier Drive
3
Digital Interface
3.1
Parallel Interface
3.2
Serial Interface (SPI)
3.3
I2C Bus and EEPROM
3.4
Connections to the PHI Connector
4
Power Supplies
4.1
External Power Connections and Test Points
4.2
Low-Dropout Regulator (TPS7A3001 for HVSS)
4.3
Low-Dropout Regulator (TPS7A4700 for AVDD, HVDD)
5
Installing the ADS8555EVM Software
6
ADS8555EVM Operation
6.1
Connecting the Hardware and Running the GUI
6.2
Jumper Settings for the ADS8555EVM
6.3
Modifying Hardware and Using Software to Evaluate Other Devices in the Family
6.4
EVM GUI Global Settings for ADC Control and Registers
6.5
Time Domain Display
6.6
Frequency Domain Display
6.7
Histogram Display
7
Bill of Materials, Layout, and Schematics
7.1
Bill of Materials
7.2
Board Layout
7.3
Schematics
8
Revision History
IMPORTANT NOTICE
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