JAJSGI7F August   2012  – November 2018 DS125BR800

PRODUCTION DATA.  

1. 1 特長
2. 2 アプリケーション
3. 3 概要
   1.     Device Images
      1.      代表的なアプリケーション
4. 4 改訂履歴
5. 5 概要（続き）
6. 6 Pin Configuration and Functions
   1.     Pin Functions
7. 7 Specifications
   1. 7.1 Absolute Maximum Ratings
   2. 7.2 ESD Ratings
   3. 7.3 Recommended Operating Conditions
   4. 7.4 Thermal Information
   5. 7.5 Electrical Characteristics
   6. 7.6 Electrical Characteristics: Serial Management Bus Interface
   7. 7.7 Timing Requirements
   8. 7.8 Typical Characteristics
8. 8 Detailed Description
   1. 8.1 Overview
   2. 8.2 Functional Block Diagram
   3. 8.3 Feature Description
      1. 8.3.1 4-Level Input Configuration Guidelines
      2. 8.3.2 PCIe Signal Integrity
         1. 8.3.2.1 RX-Detect in SAS/SATA (up to 6 Gbps) Applications
            1. 8.3.2.1.1 Signal Detect Control for Datarates above 8 Gbps
         2. 8.3.2.2 MODE Operation with SMBus Registers
   4. 8.4 Device Functional Modes
      1. 8.4.1 Pin Control Mode
      2. 8.4.2 SMBus Mode
   5. 8.5 Programming
      1. 8.5.1 SMBus Master Mode
      2. 8.5.2 Transfer of Data Via the SMBus
      3. 8.5.3 System Management Bus (SMBus) and Configuration Registers
      4. 8.5.4 SMBus Transactions
      5. 8.5.5 Writing a Register
      6. 8.5.6 Reading a Register
   6. 8.6 Register Maps
9. 9 Application and Implementation
   1. 9.1 Application Information
   2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
10. 10Power Supply Recommendations
    1. 10.1 3.3-V or 2.5-V Supply Mode Operation
    2. 10.2 Power Supply Bypassing
11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
12. 12デバイスおよびドキュメントのサポート
    1. 12.1 ドキュメントのサポート
       1. 12.1.1 関連資料
    2. 12.2 ドキュメントの更新通知を受け取る方法
    3. 12.3 商標
    4. 12.4 静電気放電に関する注意事項
    5. 12.5 Glossary
13. 13メカニカル、パッケージ、および注文情報