Menu
Product
Email
PDF
Order now
CDCLVP1212 LVPECL Output, High-Performance Clock Buffer
SCAS886E
August 2009 – December 2015
CDCLVP1212
PRODUCTION DATA.
CONTENTS
SEARCH
CDCLVP1212 LVPECL Output, High-Performance Clock Buffer
1
Features
2
Applications
3
Description
4
Revision History
5
Device Comparison Table
6
Pin Configuration and Functions
7
Specifications
7.1
Absolute Maximum Ratings
7.2
ESD Ratings
7.3
Recommended Operating Conditions
7.4
Thermal Information
7.5
Electrical Characteristics: LVCMOS Input
7.6
Electrical Characteristics: Differential Input
7.7
Electrical Characteristics: LVPECL Output, At VCC = 2.375 V to 2.625 V
7.8
Electrical Characteristics: LVPECL Output, at VCC = 3.0 V to 3.6 V
7.9
Pin Characteristics
7.10
Timing Requirements
7.11
Typical Characteristics
8
Parameter Measurement Information
8.1
Test Configurations
9
Detailed Description
9.1
Overview
9.2
Functional Block Diagram
9.3
Feature Description
9.4
Device Functional Modes
9.4.1
LVPECL Output Termination
9.4.2
Input Termination
10
Application and Implementation
10.1
Application Information
10.2
Typical Application
10.2.1
Fanout Buffer for Line Card Application
10.2.1.1
Design Requirements
10.2.1.2
Detailed Design Procedure
10.2.1.3
Application Curves
11
Power Supply Recommendations
11.1
Thermal Management
12
Layout
12.1
Layout Guidelines
12.2
Layout Example
12.3
Thermal Considerations
13
Device and Documentation Support
13.1
Community Resources
13.2
Trademarks
13.3
Electrostatic Discharge Caution
13.4
Glossary
14
Mechanical, Packaging, and Orderable Information
IMPORTANT NOTICE
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
RHA|40
MPQF135D
サーマルパッド・メカニカル・データ
RHA|40
QFND114P
発注情報
scas886e_oa
scas886e_pm
search
No matches found.
Full reading width
Full reading width
Comfortable reading width
Expanded reading width
Card for each section
Card with all content